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VLSI Design
Volume 12, Issue 1, Pages 81-99
http://dx.doi.org/10.1155/2001/58303

Distributed Fault Simulation Algorithms on Parallel Virtual Machine

Department of Electrical Engineering, Indian Institute of Technology, New Delhi 110016, India

Received 1 August 1995; Revised 6 February 1997

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [3 citations]

The following is the list of published articles that have cited the current article.

  • Yosi Ben Asher, “Hybrid Type Legalization for a Sparse SIMD Instruction Set,” Acm Transactions on Architecture and Code Optimization, vol. 10, no. 3, 2013. View at Publisher · View at Google Scholar
  • Roshan G. Ragel, Swarnalatha Radhakrishnan, Jude Angelo Ambrose, and Sri Parameswaran, “A Study on Instruction-set Selection using Multi-application based Application Specific Instruction-set Processors,” 2013 26th International Conference on Vlsi Design and 2013 12th Internation, pp. 7–12, 2013. View at Publisher · View at Google Scholar
  • D. E. Ivanov, “Parallel Simulation Algorithm of VLSI for Multicore Workstations with Dynamic Faults Grouping,” International Journal of Modeling and Optimization, vol. 6, no. 3, pp. 166–170, 2016. View at Publisher · View at Google Scholar