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VLSI Design
Volume 12 (2001), Issue 2, Pages 221-231

Backward Propagated Capacitance Model for Register Transfer Level Power Estimation

1Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, Kyungbuk 790-784, South Korea
2School of Electrical and Electronics Engineering, Chungbuk National University, Chungbuk, 361-763, South Korea

Received 20 June 2000; Revised 3 August 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


We present a new approach to the power modeling of functional modules, referred to as the backward propagated capacitance model, for estimating the power consumption of VLSI systems that are described at the register transfer level (RTL). To construct the proposed model, we investigate the effect of the module's internal capacitance on power consumption at the gate level. Then, we store the effect in a library in terms of the equivalent input capacitance of the module. The equivalent input capacitance is used to compute the module's power without the lower level elaboration during the power analysis of the RTL system. In the experiment using benchmark functional modules, the proposed model showed the absolute modeling error of 1.39% on average. For the benchmark RTL systems, the proposed model exhibited the absolute error of 3.04% in power estimation on average. If signal characteristics deviate from the modeling condition, the modeling error may increase. Experimental results show that the modeling accuracy can be improved greatly by using a simple compensation method.