FPGA Implementation of an Amplitude-Modulated Continuous-Wave Ultrasonic Ranger Using Restructured Phase-Locking Scheme

Table 2

Hardware resource utilization and logic blocks of the entire range measurement algorithm.

FPGA: Cyclone-II
Device: EP2C8T144C8
Total logic elements: 4,659/8,256 (56%)
Combinational with no register	4148
Register only	1
Combinational with a register	510
Total registers: 511/8256 (6%)
LC registers	511
Embedded multiplier 9-bit elements: 36/36 (100%)
DSP elements	36
DSP 9 $\times$ 9	0
DSP 18 $\times$ 18	18
Total pins: 62/85 (72%)
Total memory bits: 20,320/165,888 (12%)