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VLSI Design
/
2010
/
Article
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Fig 10
/
Research Article
Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs
Figure 10
Fixator models of npn and pnp transistors when globally biased for
V
B
E
(
V
E
B
),
V
C
E
(
V
E
C
), and
I
C
(the expanded versions not shown).