Error Immune Logic for Low-Power Probabilistic Computing

Table 3

Full-Adder Implementations used in experiment.

FA	$C_{\text{out}}$	Sum	No. Transis.
async	—	—	42
f28	Min3-Inv	Min3-Min4-Inv	28
fmaj	Inv-Min3	XOR3	32
fbase	XOR2-And2-Or2	XOR2-XOR2	42