Vertical Gate RF SOI LIGBT for SPICs with Significantly Improved Latch-Up Immunity

<div class="floats-full-page floats-full-page-figure"><h2>Figure 17</h2><div class="floats-full-page-caption"><table>Triggering of the parasitic dual-transistors in the proposed device structure in near critical latch-up state.</table></div><div class="floats-full-page-content"><table class="table-group" width="800px"><tr class="fig-image"><td><img alt="548546.fig.0017" src="https://static-01.hindawi.com/articles/vlsi/volume-2011/548546/figures/548546.fig.0017.jpg" /></td></tr></table></div></div>

Figure 17 | Vertical Gate RF SOI LIGBT for SPICs with Significantly Improved Latch-Up Immunity

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Figure 17: Vertical Gate RF SOI LIGBT for SPICs with Significantly Improved Latch-Up Immunity

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Figure 17

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Vertical Gate RF SOI LIGBT for SPICs with Significantly Improved Latch-Up Immunity

Figure 17