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VLSI Design
Volume 2012 (2012), Article ID 173079, 18 pages
http://dx.doi.org/10.1155/2012/173079
Research Article

Performance Analysis of High Speed Hybrid CMOS Full Adder Circuits for Low Voltage VLSI Design

1Department of Electronics Engineering, Institute of Engineering & Technology (IET), Lucknow 226021, India
2Department of Electronics and Communication Engineering, Motilal Nehru National Institute of Technology (MNNIT), Allahabad 211004, India

Received 28 June 2011; Revised 2 November 2011; Accepted 24 November 2011

Academic Editor: Jose Carlos Monteiro

Copyright © 2012 Subodh Wairya et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [8 citations]

The following is the list of published articles that have cited the current article.

  • A. K. Pandey, R. A. Mishra, and R. K. Nagaria, “Leakage Power Analysis of Domino XOR Gate,” ISRN Electronics, vol. 2013, pp. 1–7, 2013. View at PublisherView at Google Scholar
  • Shima Mehrabi, Reza Faghih Mirzaee, Keivan Navi, and Omid Hashemipour, “A High-Efficient Multi-Output Mixed Dynamic/Static Single-Bit Adder Cell,” ISRN Electronics, vol. 2013, pp. 1–8, 2013. View at PublisherView at Google Scholar
  • A. K. Pandey, R. A. Mishra, and R. K. Nagaria, “Static Switching Dynamic Buffer Circuit,” Journal of Engineering, vol. 2013, pp. 1–11, 2013. View at PublisherView at Google Scholar
  • Shipra Upadhyay, R. A. Mishra, R. K. Nagaria, and S. P. Singh, “DFAL: Diode-Free Adiabatic Logic Circuits,” ISRN Electronics, vol. 2013, pp. 1–12, 2013. View at PublisherView at Google Scholar
  • Shipra Upadhyay, R. K. Nagaria, and R. A. Mishra, “Low-Power Adiabatic Computing with Improved Quasistatic Energy Recovery Logic,” VLSI Design, vol. 2013, pp. 1–9, 2013. View at PublisherView at Google Scholar
  • Shipra Upadhyay, Mishra, Nagaria, Singh, and Amit Shukla, “Triangular power supply based adiabatic logic family,” World Applied Sciences Journal, vol. 24, no. 4, pp. 444–450, 2013. View at PublisherView at Google Scholar
  • Mohan Shoba, and Rangaswamy Nakkeeran, “GDI based full adders for energy efficient arithmetic applications,” Engineering Science and Technology, an International Journal, 2015. View at PublisherView at Google Scholar
  • Amit Kumar Pandey, Tarun Kumar Gupta, and Pawan Kumar Verma, “Sleep signal controlled footless domino circuit for low leakage current,” Circuit World, 2018. View at PublisherView at Google Scholar