Performance Analysis of High Speed Hybrid CMOS Full Adder Circuits for Low Voltage VLSI Design

Table 3

Channel width v/s MOS capacitor in 0.18 μm Tech.

Cap	2.89 fF	4.89 fF	6.89 fF	8.89 fF	10.91 fF
Width (𝑊) μm	1.59	2.71	3.83	4.95	6.07