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VLSI Design
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2012
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Article
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Tab 4
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Research Article
A Novel Framework for Applying Multiobjective GA and PSO Based Approaches for Simultaneous Area, Delay, and Power Optimization in High Level Synthesis of Datapaths
Table 4
Comparison of WSGA and NSGA II on standard benchmarks.
Benchmark
WSGA
NSGA II
Power metric
Area (register units)
Delay (time steps)
Power metric
Area (register units)
Delay (time steps)
IIR
0.9019
48.48
5.148
0.9063
35.41
5.88
HAL
0.9901
37.81
4.981
0.9923
39.91
4.75
DWT
0.7126
50.92
10
0.6821
48.95
10
FIR
0.6416
54.48
11.32
0.6312
43.58
11.23
MPEG motion vector
0.6714
107.5
9
0.6561
63.13
10.71
DCT
0.6086
79.06
12.18
0.6087
77.44
12.12