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VLSI Design
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2012
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Article
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Tab 5
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Research Article
A Novel Framework for Applying Multiobjective GA and PSO Based Approaches for Simultaneous Area, Delay, and Power Optimization in High Level Synthesis of Datapaths
Table 5
Execution times in seconds.
Benchmark circuit
WSGA
NSGA
% reduction
IIR
6
4
33.33%
HAL
11
11
0%
DWT
26
5
80.77%
FIR
112
9
91.96%
MPEG motion vector
48
23
52.08%