Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing

<table class="table-group" id="tab2"><tr><td><table class="table"><tr><td class="thead-hr" colspan="3"><hr/></td></tr><tr class="thead"><td align="left">MPSoC</td><td align="center">% THD at 1 kHz</td><td align="center">% THD at 10 kHz</td></tr><tr><td class="thead-hr" colspan="3"><hr/></td></tr><tr><td align="left">Homogeneous</td><td align="center">0.09</td><td align="center">0.12</td></tr><tr><td align="left">Heterogeneous</td><td align="center">0.09</td><td align="center">0.13</td></tr><tr class="table-tr"><td colspan="3"><hr class="tbody-hr"/></td></tr></table></td></tr></table>

THD results for the reproduction of 1 kHz and 10 kHz audio signals (16-bit 44.1 KHz CD quality).

VLSI Design

tab2

Table 2

Table 2: Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing 

Table 2 | Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing 