Test Generation for Crosstalk-Induced Delay Faults in VLSI Circuits Using Modified FAN Algorithm

Table 3

The ISCAS’85 and scan version of ISCAS’89 circuit characteristics.

Circuit	Number of inputs	Number of outputs	Number of Gates	Number of paths	Number of critical paths	Number of victims	Total target faults
c17	5	2	6	11	6	7	42
c432	36	7	160	83926	2199	103	9327
c880	60	26	383	8642	92	70	9279
c499	41	32	202	9440	14	207	21879
c1908	33	25	880	729057	32	93	25916
s27	7	4	10	28	6	10	74
s208	19	10	96	145	2	18	743
s208.1	18	9	104	142	1	12	558
s298	17	20	119	231	1	10	537
s526	24	27	193	410	1	10	891
s386	13	13	159	207	10	49	4195
s510	25	13	211	369	1	13	1098
s420.1	34	17	218	474	1	14	1276
s1196	32	32	529	3097	9	55	10630
s1238	32	32	508	3558	30	45	5822
s13207.1	700	790	7951	1345319	565	188	241743
s15850.1	611	684	9772	164738035	8238	341	240814