Design Space of Flexible Multigigabit LDPC Decoders

<table>Column-based decoder processing <svg height="11.175" id="M52" style="vertical-align:-0.0pt" version="1.1" viewbox="0 0 17.475 11.175" width="17.475" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.113)"><use xlink:href="#x1D440"></use></g>
</svg> CNs and <svg height="11.175" id="M53" style="vertical-align:-0.0pt" version="1.1" viewbox="0 0 36.625 11.175" width="36.625" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.113)"><use xlink:href="#x34"></use></g><g transform="matrix(.017,-0,0,-.017,11.996,11.113)"><use xlink:href="#xD7"></use></g><g transform="matrix(.017,-0,0,-.017,25.748,11.113)"><use xlink:href="#x1D443"></use></g>
</svg> VNs per cycle.</table>

VLSI Design

Design Space of Flexible Multigigabit LDPC Decoders

Figure 4