VLSI Design

VLSI Design / 2013 / Article / Tab 4

Research Article

A High-Speed and Low-Energy-Consumption Processor for SVD-MIMO-OFDM Systems

Table 4

Circuit performance with division and square-root units.

Single Block (18 entries)

Calculation time (ms) 6.33 1.16
(per matrix) (0.06) (0.01)
Gate count 82,376 90,885
Power consumption (mW) 22.1 39.4
Energy consumption ( J) 139.9 45.8
(per matrix) (1.3) (0.4)