Given: BPF (Figure 1) with NMOS ( to ), inductors (, , ), capacitors (, , , and ), | current sources (, , ), power (pw) | Input: and | Objective: BPF to meet a specified center frequency and bandwidth | Output: NMOS sizes, capacitors and inductors value | Design approach: //BPF design to meet the specified center frequency and bandwidth// | (1) Specify DC power (pw0), center frequency (), bandwidth (BW0); | (2) Calculate , and based on pw0; | (3) Set , , based on , and ; | (4) Set initial value , and ; | (5) Given , , , , , and , | set and to make a little greater than and make a little greater than ; | set to make ; | (6) | (7) while () //Optimize , , in iterations | (8) ; | ; | (9) do DC simulation; | (10) if /pw > 0.01 then and go to Step (7); | (11) else exit; | (12) end if} | (13) adjust , , , , , ; | do AC simulation; //find | (14) If then go to Step (17) | (15) else go to Step (13) | (16) end if; | (17) adjust ; | (18) do AC simulation; //find BW | (19) If /BW0 < 0.01 then exit; | (20) else go to Step (17) | (21) end if; |
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