Shared Reed-Muller Decision Diagram Based Thermal-Aware AND-XOR Decomposition of Logic Circuits

Table 1

Area comparison of SRMDD with [10].

Benchmark; circuits				Area (number of product terms) (, )
				SRMDD based AND-XOR	RM tree [10]	Heuristic [10]
5xp1	7	10	75	61	61	61
alu2	10	6	251	225	—	—
apex4	9	19	438	445	445	512
clip	9	5	192	206	206	206
cm82a	5	3	23	16	—	—
cm162a	14	5	47	25	—	—
cm163a	16	5	34	18	—	—
duke2	22	29	87	255	255	267
ex5	8	63	256	113	113	171
f51m	8	8	76	56	56	73
inc	7	9	34	48	48	49
lal	26	19	102	107	—	—
misex1	8	7	32	32	20	20
pbo2	15	15	123	174	—	—
pcler8	27	17	61	40	—	—
rd53	5	3	32	20	20	20
rd73	7	3	141	64	63	63
shiftc	8	21	75	47	—	—
sqrt8	8	4	40	26	—	—
squar5	5	8	30	23	22	22
tcon	17	16	24	24	—	—
ttt2	24	21	158	107	—	—
x2	10	7	35	30	—	—
xor5	5	1	16	5	5	5
z4ml	7	4	59	33	—	—
Z5xp1	7	10	128	61	—	—
o64	130	1	65	61	—	—
apex5	117	88	1227	986	—	—
x3	135	99	739	702	—	—
Average % improvement with respect to RM tree [10]				−3.61
Average % improvement with respect to heuristic [10]				5.00