State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers

Algorithm 2

SSCM-based register allocation algorithm.

while not empty do

if there is an with degree   then

delete

else

obtain the frequency set by offline profiling

sort variables based on the descending write cost

choose with MAX COST

add to spilling_list

delete

end if

ifno variable has been spilled then

color the variables in reverse order of deleting

else

spill each everywhere

rebuild the interference graph and repeat the procedure

end if

end while