VLSI Design

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Research Article

State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers

Table 3

Switching currents of MLC STT-RAM cell (A).

To
FromR00R01R10R11

R000−38.3−56.7
R0126.30−56.7
R1066.40−9.1
R1166.439.30

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