Wireless Communications and Mobile Computing

Volume 2018, Article ID 8928761, 6 pages

https://doi.org/10.1155/2018/8928761

## Adding a Rate-1 Third Dimension to Parallel Concatenated Systematic Polar Code: 3D Polar Code

Key Laboratory of Universal Wireless Communications, Ministry of Education, Beijing University of Posts and Telecommunications, Beijing 100876, China

Correspondence should be addressed to Zhenzhen Liu; nc.ude.tpub@uilzz

Received 24 November 2017; Revised 8 March 2018; Accepted 27 March 2018; Published 3 May 2018

Academic Editor: Zesong Fei

Copyright © 2018 Zhenzhen Liu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

In this paper, a three-dimensional polar code (3D-PC) scheme is proposed to improve the error floor performance of parallel concatenated systematic polar code (PCSPC). The proposed 3D-PC is constructed by serially concatenating the PCSPC with a rate-1 third dimension, where only a fraction of parity bits of PCSPC are extracted to participate in the subsequent encoding. It takes full advantage of the characteristics of parallel concatenation and serial concatenation. In addition, the convergence behavior of 3D-PC is analyzed by the extrinsic information transfer (EXIT) chart. The convergence loss between PCSPC and different provides the reference for choosing the value of for 3D-PC. Finally, the simulation results confirm that the proposed 3D-PC scheme lowers the error floor.

#### 1. Introduction

The novel concept of parallel concatenated systematic polar code (PCSPC) was first put forward in [1]. PCSPC scheme consists of two systematic polar codes (SPCs) [2]. It has performance advantage with respect to original SPC. In [3], the extrinsic information transfer (EXIT) charts of different length SPC have been given. As a promotion of the above EXIT chart results, the convergence behavior of PCSPC can be analyzed. It can be observed that SPC with larger code length leads to narrower opening. Therefore, it is difficult for PCSPC with large code length SPCs to converge at low error rate. The motivation of our work is to solve this problem.

As we know, there is error floor for turbo code (TC) at block error rate (BLER) around [4]. In order to improve the performance of TC in the error floor region, three-dimensional turbo code (3D-TC) has been studied in [5–7]. 3D-TC scheme was proposed by serially concatenating a rate-1 cyclic recursive systematic convolutional (CRSC) code to conventional TC. It is important to note that only a fraction of parity bits from TC are extracted to participate in the encoding again. Compared with conventional TC, 3D-TC scheme has larger minimum distance. Therefore, 3D-TC improves the error floor performance greatly. In addition, the influence of of 3D-TC on convergence threshold and minimum distance has been researched in [6, 7].

It is known from the literature that serial concatenated code has larger minimum distance with respect to parallel concatenated code; however, its convergence threshold is worse than that of parallel concatenation [8]. Meanwhile, inspired by the idea in [7], 3D polar code (3D-PC) scheme is proposed to improve the error floor performance of PCSPC in this paper. It makes full use of the features of parallel concatenation and serial concatenation. 3D-PC is constituted by adding a rate-1 CRSC code to PCSPC. And only a fraction of parity bits of PCSPC are sent to the third encoder. Moreover, the convergence behavior of 3D-PC is analyzed by EXIT chart method [9]. It can be utilized to guide the choice of which is an important parameter that affects the performance of 3D-PC. Simulation results corroborate the effectiveness of 3D-PC scheme to improve the low error rate performance.

The paper is organized as follows. Section 2 reviews systematic polar code and EXIT chart. 3D-PC scheme is proposed in Section 3. In Section 4, convergence analysis of 3D-PC is presented. The simulation results are shown in Section 5. Section 6 concludes this paper.

#### 2. Preliminaries

##### 2.1. Systematic Polar Code

Polar code is a capacity-achieving channel code which was proposed by Arıkan in [10]. Given code length and code rate , the reliabilities of subchannels can be obtained by Gaussian approximation method [11] or other construction algorithms. Then the subchannels with high reliability are used to transmit information bits, and other subchannels are utilized to deliver frozen bits. Let set denote the indexes of those high reliability subchannels. Supposing that the input sequence is given, the codeword of polar code can be obtained bywhere is the generator matrix, denotes the bit-reversal permutation matrix, denotes the -th Kronecker product, and .

Since the input source sequence can be decomposed into two parts and , the codeword in (1) can be written aswhere is the information bits, denotes the complement of , and consists of the rows of with indices in .

Systematic polar code is constructed based on polar code [2]. Assume that -elements set denotes the indexes of system bits; then denotes system bits and is the check bits. Equation (2) can be rewritten aswhere denotes the submatrix of with row indexes in and column indexes belonging to .

As to SPC, the systematic bits are known and are also known and set to zero; thus can be calculated according to (3):

Further, the check bits can be computed by (4):

Here, the codeword of SPC is achieved.

##### 2.2. EXIT Chart

EXIT chart [9] is an efficient convergence analysis tool for the iterative decoding structure. It tracks the average mutual information of constituent decoders.

We use and to denote the transmitted bits and the corresponding a priori information, respectively. And is modeled as an independent Gaussian random variable with the following expression:

withwhere is a Gaussian random variable with mean zero and variance . Under the above assumption, the mutual information between transmitted bits and a priori information can be written as

Assume that extrinsic information is denoted by . The mutual information between and is calculated aswhere is the probability distribution function given condition . It can be obtained by Monte Carlo simulation.

#### 3. Proposed 3D Polar Code Scheme

##### 3.1. Encoding Structure

In short, 3D-PC scheme can be regarded as a concatenation of the inner code and outer code, PCSPC. The encoding structure of 3D-PC is illustrated in Figure 1. First of all, the input information sequence with length is encoded by parallel concatenated systematic polar encoder. The component encoders of PCSPC are written as and , respectively. Both of them are systematic polar encoders. We use and to denote the parity bits sequence of and , respectively. Further, the codeword can be obtained by taking the bits from and alternatively. The fraction of is interleaved by the interleaver and sent to the postencoder for encoding, where is named as permeability rate. And codeword is output by the postencoder . The parity bits chosen for encoding follow a certain puncturing pattern with length . The fraction of is passed to the channel straightly, denoted by . The patterns and are complementary. Furthermore, the last codeword of 3D-PC with code length is obtained by combining the input sequence , the parity sequence , and the parity sequence . Here the code rate of 3D-PC is calculated by . In order to achieve higher code rate, it is need to puncture some parity bits from or . Since contains more information, is first taken into consideration.