Formal Verification of Hardware Components in Critical Systems

<table class="algorithm-group"><tr><td><table class="algorithm" id="alg23"><tr><td>(1)</td><td>Theorem check_equiv_BCD_adder: forall D C B A d c b a e,</td></tr><tr><td>(2)</td><td> BCDadder D C B A d c b a e <svg height="5.65839pt" id="M331" style="vertical-align:-0.04980993pt" version="1.1" viewbox="-0.0498162 -5.60858 7.75925 5.65839" width="7.75925pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M535 323V373H52V323H535ZM535 138V188H52V138H535Z"></path></g></svg> BCDadderLA D C B A d c b a e.</td></tr></table></td></tr></table>

<div> Proof of equivalence of BCD adders (with and without look-ahead carry).</div>

Wireless Communications and Mobile Computing

alg23

Listing 23

Listing 23: Formal Verification of Hardware Components in Critical Systems 