Design of Shock Wave Storage and Test System with Variable Parameters Based on the Sensor of Piezoelectric Circuit

Table 5

Dynamic memory also needs strict timing to realize the functions.

Item	DC	AC	Sleep mode	Standby mode	Test node
Switch signal	2.05	3.26	1.22	2.8	1.32
Bus signal	5.97	5.87	5.83	2.43	3.38
SDRAM	4.46	2.15	1.62	3.69	1.15
FPGA	2.82	1.76	2.2	1.22	2.42
Power consumption	2.08	1.1	3.42	2.75	2.98