PackeX: Low-Power High-Performance Packet Classifier Using Memory on FPGAs
Algorithm 1
The proposed packet-classification algorithm (PackeX).
Input: Data packet having destination address ()
Output: Corresponding node where the packet needs to be forwarded ()
Procedure (The algorithm is used to forward incoming packet to appropriate output port)
[Apply the incoming data packet to A-block to get destination output port];
for to do
Next
end for
[Apply the incoming destination address to P-block to get destination output port];
for to do
ifthen
Exit
Next
end for
[Finish];
end procedure
Note: A-block represents the address block where the destination addresses are stored, while P-block represents the pointers block where the pointers to the corresponding node are stored.
