Implementation of Power Efficient Flash Analogue-to-Digital Converter

Figure 6

Schematic of Gray Code encoder using DCVS logic.

(a) Gray code BIT-0 generation circuit

(b) Gray code BIT-1 generation circuit

(c) Gray code BIT-2 generation circuit

(d) Gray code BIT-3 generation circuit

(e) Gray code BIT-4 generation circuit