Implementation of Power Efficient Flash Analogue-to-Digital Converter

Table 5

Comparative performance analysis of candidate design.

	References
	Proposed ADC simulated results	Simulated results [8]	Simulated results [11]	Simulated results [18]	Simulated results [19]
Technology	180 nm	180 nm	500 nm	180 nm	180 nm
Resolution	5-bit	5-bit	5-bit	5-bit	4-bit
Supply voltage	±0.85 V	1.8 V	2.5 V	1.5 V	1.8 V
Analogue input voltage range	−0.45 V to 0.75 V	differential input range ± 0.4 V	—	—	1 Vpp
Power (mW)	46.69	63	83	68.63	70
Sampling rate GS/s	5	1	1.5	—	5.0
Maximum DNL (LSB)	−0.24	0.175	0.43	0.0012	0.34
Maximum INL (LSB)	−0.30	0.261	0.32	0.0015	0.24