CMOS Realization of All-Positive Pinched Hysteresis Loops
Figure 16
(a) Experimental results of the plot of and at 1 kHz for the circuit of Figure 1(a). (b) Oscilloscope trace of the pinched hysteresis loop of the memristor emulator circuit of Figure 1(a) at 1 kHz, (c) at 600 Hz, and (d) at 1.5 kHz.
