CMOS Realization of All-Positive Pinched Hysteresis Loops

Figure 17

(a) Experimental results of the plot of and at 700 Hz for the circuit of Figure 1(b). (b) Oscilloscope trace of the pinched hysteresis loop at 700 Hz, (c) at 400 Hz, and (d) at 2 kHz.

(a)

(b)

(c)

(d)