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Research Article | Open Access
Efficiency and Droop Improvement in GaN-Based High-Voltage Flip Chip LEDs
The GaN-based high-voltage flip chip light-emitting diode (HVFC-LED) is designed and developed for the purpose of efficiency enhancement. In our design, the distributed Bragg reflector (DBR) is deposited at the bonded substrate to increase the light extraction. After the flip chip process, the general current-voltage characteristics between the flip chip sample and the traditional sample are essentially the same. With the help of great thermal conductive silicon substrate and the bottom DBR, the HVFC-LED is able to enhance the power by 37.1% when compared to the traditional high-voltage LEDs. The wall-plug efficiencies of the HVFC-LED also show good droop reduction as high as 9.9% compared to the traditional devices.
The availability of high brightness, high power, and large area of GaN-based light-emitting diodes (LEDs) has enabled their applications in exterior automotive lightings, outdoor displays, backlights for liquid crystal display (LCD) TVs, various handheld devices, printers, and rear projection TVs . However, the notorious efficiency droop phenomenon makes the GaN LEDs more power-consuming at higher current and causes the increase of chip cost. Various mechanisms have been proposed as the reasons of this efficiency droop, including electron leakage out of the active region, Auger recombination, carrier delocalization, and poor hole injection [2–5]. To further reduce the production cost and enhance the performance of these LEDs, there is always a great need to improve the external quantum efficiency (EQE) and solve the efficiency droop. Recent studies have substantially alleviated droop by new active region design such as reduced charge separation [6–8], nano/microphotonics structures [9, 10], novel growth and substrate technologies , and barrier engineering . In addition, the optimization of the light extraction efficiency is of great importance to achieve large EQE in the nitride-based LEDs. Previously, it has been shown that one can utilize a transparent contact layer (TCL) , patterned sapphire substrates (PSSs) [14, 15], surface texturing (ST) , and/or flip chip (FC) technology [17–19] to enhance light extraction of nitride-based LEDs. Using TCL, one can reduce absorption of the conventional Ni-Au -contact layer. One can reduce dislocation density in the epitaxial layers and also enhance light scattering at GaN—sapphire interface by PSS technology. With ST technology, photon emission can be randomized by surface scattering due to the roughened top surface of the LED. By FC technology, one can achieve larger LED output power since no bonding pads or wires exist on top of the devices so that photons could be emitted freely from the substrates.
Until recently, the traditional sapphire-based high power LED still dominates the lighting market. Due to poor thermal conductivity of the sapphire substrate, high operational current leads to current-crowding and bad thermal dispersion problem. These problems are always haunting the high-current performance of the traditional LEDs. Recent research on high-voltage light-emitting diode (HV-LED) has shown that multiple series-connected microdiodes in a single large chip can obtain high forward voltage with a low driving current, thereby reducing current crowing and efficiency droop [20–22]. Moreover, the HV-LED can effectively avoid thermal problem due to relatively low operating current. Another advantage brought by high-voltage/low current operation is the direct utilization of the regular wall plug outlet without further voltage conversion. These features, combined with fewer wire-bonding needed, make HV-LED attractive for commercial applications.
In this study, a high-voltage flip chip LED (HVFC-LED) which consists of -side up multiple series-connected diodes is demonstrated. This design provides high thermal conductivity and high bottom reflection silicon submount. In addition to these features, a high wall-plug efficiency can be expected . In the subsequent text, we will discuss fabrications and performance analysis of this device.
2. Device Fabrication and Measurement
In the experiment, the LEDs were grown on -plane sapphire substrate by metal-organic chemical vapor deposition (MOCVD) system. The structure includes a -GaN layer, an N/GaN multiple-quantum wells, a -AlGaN electron blocking layer, and a -GaN layer. In the device fabrication, firstly, a 120 nm indium tin oxide (ITO) transparent conductive layer was deposited by e-beam evaporator. Then, the mesa of microchips and -contact area were etched by inductively coupled plasma (ICP) etcher. After that, the 10 μm trenches were etched by ICP between microchips [22–24]. To prevent the short circuit between each microchip, the passivation SiO2 layer (700 nm) was deposited by plasma enhanced chemical vapor deposition (PECVD), and the interconnected Cr/Pt/Au (50/50/1500 nm) was up to evaporation by e-beam evaporator to serve as cathodes. Until this step, the multiple series-connected diodes are done.
Before connecting the chip and the submount, 15 pairs of SiO2/TiO2 distributed Bragg reflector (DBR) were prepared on silicon submount by e-beam evaporator . Finally, through 280°C 15 min thermal reflow, the 45 mil × 45 mil chip is flip mounted on this reflective silicon submount by gold-tin eutectic bonding and then the process is finished. For comparison purpose, two different types of packaged LED chips were prepared: the first one is the conventional HV-LED with patterned sapphire substrate and the other is similar to HV-LED but extra 5.5 pairs of SiO2/TiO2 and Al/Ti/Ni/Au omnidirectional reflector (ODR) layer were deposited at the bottom of sapphire substrate. Both types of devices are of the same chip size and referred to as HV-LED and HV-LED + ODR, respectively.
Figure 1 shows the schematic diagrams of the three LEDs . To have a fair comparison, the reflectivities at 455 nm for both DBR and ODR were close to 100%. Both reflectances were shown in Figure 2. The optical and electrical characteristics of the devices were measured at room temperature using a manual probing system with integrating sphere detector and supplying steady DC current by Keithly 2600 . In order to eliminate the thermal effect under continuous DC current which can decimate to lead the light output power, a separate -- characteristic under pulse mode with 2.5% duty cycle was performed.
Thermal dispersion of substrate can be analyzed by using T3Ster thermal transient tester to measure thermal resistance () and junction temperature (). From Table 1, the HVFC-LED clearly has a leading edge on both and . These data strengthen the claim that HVFC-LED has good thermal dispersion.
3. Results and Discussion
Figure 3 shows the -- curves of these three LED devices. At the same 20 mA driving current, the forward voltages of these three LEDs were 49.0~50.0 V. Compared with conventional HV-LED and HV-LED + ODR, the light output power of HVFC-LED is found to be enhanced by 37.1% and 5.1% at the same 20 mA current injection, respectively. There are two main reasons for the large enhancement of power intensity: The configuration of HVFC-LED provides better thermal conductivity by extra high reflection and high thermal conductive silicon submount (silicon~120 W/mK versus Al2O3 ~ 25 W/mK) and not any effect by electrode shadow, thus leading to higher light output power and better efficiency.
Due to different packaging design, even though the reflectances of ODR and DBR are similar, the outcomes are different. In the HV-LED + ODR design, the outgoing photons have to travel through a thick -type GaN and a thick sapphire substrate before hitting the ODR layer structure. This trip through -GaN can effectively reduce the reflected photons by the extra scattering and GaN absorption, and thus the effect of ODR is hindered. On the contrary, in the flip chip bonded device the photons travel much less distance before reaching the DBR layer, and the bouncing of the photons can be more pronounced than HV-LED + ODR case.
All these factors can be seen via the output powers and efficiencies shown in Figures 3 and 4. The device efficiencies of the conventional HV-LED, HV-LED + ODR, and HVFC-LED at the same 1 watt consumed power were calculated as 31.8%, 40.8%, and 44.0%, respectively. The device efficiency droop can be written as
According to (1), the droops of the conventional HV-LED, HV-LED + ODR, and HVFC-LED were calculated as 32.2%, 31.6%, and 29.0%, respectively (Table 2). As a result, the HVFC-LED possesses droop reduction of 9.9% and 9.2% in regard to traditional HV-LED and HV-LED+ODR. At 3 watts consumed power, thedroops of these three devices were calculated as 55.0%, 55.8%, and 52.7%, respectively. The HVFC-LED also improved efficiency droop 4.2% and 5.6% in regard to the other two devices. The major impact comes from the configuration of HVFC-LED which provides better thermal conductivity and photon extraction via silicon substrate and DBR deposition.
Figure 5 shows the measured light pattern of these three LEDs. The light intensity distribution of these three kinds of devices was under the same measurement setting. The power intensity of HVFC-LED and two references were demonstrated in -- curve, and the measured values were 432 mW, 411 mW, and 315 mW, respectively. Figure 6 shows the simulated results of these three LED devices by using the optical ray tracing simulation software. The model was composed of 15 units of LEDs with either top or bottom surface emission capabilities, and the emitted rays could escape the chip from either surfaces. As we discussed before, three cases were analyzed: (1) the rays directed through the sapphire substrate without any reflector as conventional HV-LED, (2) the rays reflected by reflector on the backside of sapphire as HV-LED + ODR device, and (3) the rays reflected by reflector of submount substrate as HVFC-LED model. As shown in simulation results, the total flux of conventional HV-LED, HV-LED + ODR, and HVFC-LED was approximated 0.0200 lm, 0.0276 lm, and 0.0291 lm, respectively. The enhancement by the HVFC-LED compared to HV-LED and HV-LED + ODR cases is calculated as 45.5% and 5.4%. These values show good agreement with the enhancement of power intensity (37.1% and 5.1%) in experiment data. However, the calculation does not take into account the effects like current spreading or nonideal interface scattering which could erode the actual light extraction enhancement of our HVFC-LED devices. This result confirms that the HVFC-LED design did contribute to increasing flux and power intensity.
In conclusion, the high-voltage flip chip light-emitting diodes (HVFC-LED) were investigated, and three types of devices including InGaN HVFC-LED, conventional HV-LED, and HV-LED + ODR were all prepared and tested at the same time. The results indicated HVFC-LED improved the power intensity around 37.1% and 5.1% compared to the other two types of devices under 20 mA drive. At the same time, the efficiency droop of HVFC-LED improved approximation to 9.9% and 9.2% compared to both references. When the consumed power is increased, the droop improvement is not scaled. These measurement and simulation results all point out to the HVFC-LED being indeed a better design in terms of packaging, and we believe this design can be beneficial for the future generation of solid state lighting.
Conflict of Interests
The authors declare that there is no conflict of interests regarding the publication of this paper.
This work was supported in part by the National Science Council in Taiwan under Grant nos. NSC-103-3113-E-009-001-CC2 and NSC101-2221-E-009-046-MY3.
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