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International Journal of Reconfigurable Computing
Volume 2008, Article ID 736203, 10 pages
http://dx.doi.org/10.1155/2008/736203
Research Article

The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units

1Department of Computing, Imperial College London, London SW7 2AZ, UK
2Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, British Columbia, Canada V6T 1Z4
3Department of Computer Science and Engineering, Chinese University of Hong Kong, Hong Kong

Received 7 July 2008; Accepted 30 October 2008

Academic Editor: Gustavo Sutter

Copyright © 2008 Chi Wai Yu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Chi Wai Yu, Julien Lamoureux, Steven J. E. Wilton, Philip H. W. Leong, and Wayne Luk, “The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units,” International Journal of Reconfigurable Computing, vol. 2008, Article ID 736203, 10 pages, 2008. https://doi.org/10.1155/2008/736203.