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International Journal of Reconfigurable Computing
Volume 2012, Article ID 368351, 16 pages
Research Article

Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic

Department of Computer Science, Augsburg University of Applied Sciences, An der Hochschule 1, 86161 Augsburg, Germany

Received 4 May 2012; Revised 17 September 2012; Accepted 17 September 2012

Academic Editor: René Cumplido

Copyright © 2012 Michael Schaeferling et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [9 citations]

The following is the list of published articles that have cited the current article.

  • Chiranji Lal Chowdhary, Kanguana Muatjitjeja, and Dharm Singh Jat, “Three-dimensional object recognition based intelligence system for identification,” 2015 International Conference on Emerging Trends in Networks and Computer Communications (ETNCC), pp. 162–166, . View at Publisher · View at Google Scholar
  • Sung-Joon Jang, Sang-Seol Lee, Youngbae Hwang, and Byeongho Choi, “High performance system-on-chip implementation for object recognition of mobile robot,” 2016 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia), pp. 1–2, . View at Publisher · View at Google Scholar
  • Hung-Yu Tseng, Po-Chen Wu, Yu-Sheng Lin, and Shao-Yi Chien, “D-PET: A direct 6 DoF pose estimation and tracking system on graphics processing units,” 2017 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–4, . View at Publisher · View at Google Scholar
  • M. S. Chelva, S. V. Halse, and B. K. Ratha, “Object tracking in real time embedded system using image processing,” 2016 International Conference on Signal Processing, Communication, Power and Embedded System (SCOPES), pp. 1840–1844, . View at Publisher · View at Google Scholar
  • Sang-Seol Lee, Sung-Joon Jang, Jungho Kim, Youngbae Hwang, and Byeongho Choi, “Memory-efficient SURF architecture for ASIC implementation,” Electronics Letters, vol. 50, no. 15, pp. 1059–1060, 2014. View at Publisher · View at Google Scholar
  • Matthias Pohl, Michael Schaeferling, and Gundolf Kiefer, “An efficient FPGA-based hardware framework for natural feature extraction and related Computer Vision tasks,” Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014, 2014. View at Publisher · View at Google Scholar
  • Daniele Palossi, Martino Ruggiero, and Luca Benini, “3D CV Descriptor on Parallel Heterogeneous Platforms,” ACM Transactions on Embedded Computing Systems, vol. 14, no. 4, pp. 1–25, 2015. View at Publisher · View at Google Scholar
  • Hilal Tayara, Woonchul Ham, and Kil Chong, “A Real-Time Marker-Based Visual Sensor Based on a FPGA and a Soft Core Processor,” Sensors, vol. 16, no. 12, pp. 2139, 2016. View at Publisher · View at Google Scholar
  • Y.H. Moon, I.K. Eom, and S.H. Cheon, “Fast descriptor extraction method for a SURF-based interest point,” Electronics Letters, 2016. View at Publisher · View at Google Scholar