Fuzzy Logic Based Hardware Accelerator with Partially Reconfigurable Defuzzification Stage for Image Edge Detection

Table 1

The fuzzy rules.

Fuzzy inputs				Fuzzy output
		HP	LP
LOW	LOW	x	x	LOW
MED	MED	x	x	MED
HIGH	HIGH	x	x	HIGH
LOW	x	LOW	x	MED
x	LOW	LOW	x	MED
LOW	x	x	LOW	LOW
x	LOW	x	LOW	LOW