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Research Letters in Communications
Volume 2009 (2009), Article ID 230276, 4 pages
Research Letter

Chip-Level HARQ Chase Combining for HSUPA

1Lab-STICC, Institut Telecom, Telecom Bretagne, UMR CNRS 3192 Lab-STICC, Technopôle Brest-Iroise, CS 83818 29238 Brest Cedex 3, France
2TELECOM Bretagne institution, Université européenne de Bretagne (UEB), France
3Orange Labs, 38-40 rue du generale-Leclerc, 92792 Issy Moulineaux Cedex 9, France
4Communication Systems Department, Institut National des Postes et Télécommunications (INPT), Madinat Al Irfane, Rabat 10000, Morocco

Received 19 November 2008; Accepted 23 January 2009

Academic Editor: Adnan Kavak

Copyright © 2009 Mohamed Et Tolba et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Hybrid automatic repeat request (HARQ) is used in high-speed uplink packet access (HSUPA) to increase the data rate. Chase combining is the simplest of HARQ algorithms. It provides a time diversity and requires a small memory. In this paper, we propose a technique to increase the chase combining efficiency. In this method, HARQ transmissions are seen as additional receive antennas which are jointly combined at chip-level using a space-time linear minimum square error (LMMSE). We demonstrate that the chase combining diversity gain is considerably increased especially for high-order modulation.

1. Introduction

High-speed uplink packet access (HSUPA) is designed to reach high data rates in universal mobile telecommunications system (UMTS) uplink. Its implementation includes new technologies such as fast scheduling as well as hybrid automatic repeat request (HARQ). There are two well-known HARQ algorithms used for HSUPA: chase combining and incremental redundancy (IR) [1]. In chase combining algorithm, when a received packet is erroneous, it is saved in the receiver buffer and a negative acknowledgment (NACK) is sent to the transmitter in order to retransmit the packet. At the receiver end, the retransmitted packet is combined, before decoding, with the previously saved one [2]. This results in a time diversity gain for multipath channels. In the IR approach, each retransmission carries additional redundancy, and a coding gain is provided after combining different HARQ transmissions.

The conventional rake receiver with receive diversity is used for detecting HARQ transmission in HSUPA system. It has been demonstrated that this receiver provides good performance for high spreading factors with binary phase-shift keying (BPSK) modulation. However, it exhibits a significant performance degradation in the case of low spreading factors with high-order modulation. The chip-level LMMSE equalizer has been proposed for HSUPA as a solution to this performance degradation. It was subject to many studies in recent years. In [3], authors have shown that the LMMSE chip-level equalizer with receive diversity provides a significant performance enhancement for high speed downlink packet access (HSDPA). The chip LMMSE has been extended to MIMO multicode CDMA system in [4] without taking account of HARQ. In [5], the LMMSE is jointly applied with HARQ at symbol-level for space-time bit interleaved coded modulation (STBICM) systems over multiple input multiple output (MIMO) channel with intersymbol interference (ISI).

Soft bit-level combining is the simplest way to combine HARQ transmissions before decoding. In addition to its implementation simplicity, it has been shown that this method offers a considerable gain for HSUPA [1]. However, its performance is severely degraded in fading channels when it is used with chase combining for high-order modulation. To overcome this performance degradation, we propose a chip-level combining method based on LMMSE chip equalizer which is an interference resistant receiver. In this method, HARQ transmissions are seen as additional receive antennas. Hence, the receive diversity gain is increased. The different HARQ transmissions (receive antennas) are jointly exploited by a single LMMSE filter to provide the equalized chip as the combining result. In this manner, we jointly benefit from the time diversity provided by the multipath channel, and the space diversity offered by the receive antennas. It is shown that the proposed method outperforms the soft bit-level combining. A considerable gain is provided in the case of high-order modulation.

2. HSUPA System Overview

To reach the required quality of service, HSUPA introduces a new transport channel named enhanced dedicated channel (E-DCH) which supports sophisticated signal processing operations. For error detection, it uses a cyclic redundancy check (CRC) code which adds 24 bits to each HSUPA transport block. The CRC code is followed by a 1/3 turbo code to protect E-DCH data against channel impairment. After channel coding, a rate matching operation is applied to adapt the number of bits at the output of turbo code to the desirable data rate. One or several E-DCH dedicated physical data channels (E-DPDCHs) are then used to carry the E-DCH data [6]. The E-DPDCHs are separately interleaved and a bit to symbol mapping is applied for each E-DPDCH. In the case of BPSK modulation, each bit is mapped to a symbol which takes value in {1,+1}. Recently, the 16-quadrature amplitude modulation (QAM) is also specified for HSUPA. Its constellation is built using two orthogonal 4-pulse amplitude modulation (PAM) constellations. In 4-PAM, a set of two consecutive bits, 𝑏𝑘,𝑘𝑘+1 is converted to a real-valued symbol 𝑠𝑘 given by 𝑠𝑘=15𝑏𝑘2+𝑏𝑘+1.(1) After bit to symbol mapping, each physical channel is spread with a real-valued orthogonal variable spreading factor (OVSF) code. The spreading factor may be different from one physical channel to another. The spreading factor SF=2 is allowed for HSUPA, especially for high data rates. After the spreading, each physical channel is weighted by a gain factor in order to compensate the difference between spreading factors. After that, the physical channels are IQ (in-phase/quadratue-phase) multiplexed to form a single complex-valued stream of chips which is scrambled and sent through a multipath channel. A chip-spaced channel model of length 𝐿 is assumed in this work. The signal is received by two antennas at the receiver end. A chip LMMSE equalizer of length 2𝐸+1 is jointly applied to the two received signals for channel equalization. After despreading, the signal is converted to the log-likelihood ratios (LLR) required by the turbo decoder. Before the decoding process, the LLR sequence is deinterleaved and inversely rate-matched. The decoder is followed by a CRC decoder for residual error detection. When a packet is detected to be in error, it is saved and a NACK is sent to the transmitter which retransmits the packet. At the receiver, the retransmitted packet is combined with the previously received one. This increases the probability of correct decoding.

3. System Model

Consider an observation window of length 2𝐸+1, and let us denote by 𝐱𝑚 the vector corresponding to the transmitted multicode chip at the instant 𝑚𝑇𝑐, where 𝑇𝑐 is the chip duration. When the HARQ is not considered, the received signal at the base station is expressed as 𝐲1𝑚𝐲2𝑚=𝐇1𝐇2𝐱𝑚+𝐧1𝑚𝐧2𝑚,(2) where 𝐲𝑖𝑚=[𝑦𝑖𝑚𝐸,,𝑦𝑖𝑚,,𝑦𝑖𝑚+𝐸]𝑇 is the received signal at the 𝑖th(𝑖=1,2) antenna when the vector 𝐱𝑚=[𝑥𝑚𝐸𝐿+1,,𝑥𝑚,,𝑥𝑚+𝐸]𝑇 is transmitted through the multipath channel represented by the (2𝐸+1)×(2𝐸+𝐿) Toeplitz matrix 𝐇𝐢 between the transmit antenna and the 𝑖th receive antenna. 𝐧𝑖𝑚=[𝑛𝑖𝑚𝐸,,𝑛𝑖𝑚,,𝑛𝑖𝑚+𝐸]𝑇 is a vector of complex white Gaussian noise samples each of which has the power spectral density 𝑁0. The received signals 𝐲1𝑚 and 𝐲2𝑚 are jointly delivered to a space-time LMMSE chip equalizer to reduce the interference effect. The equalizer output corresponding to the 𝑚th chip is expressed as 𝑥𝑚=𝐰𝐻𝐲𝑚,(3) where 𝐰 is the space-time LMMSE filter of size 2(2𝐸+1), ()𝐻 denotes the Hermitian operator, and 𝐲𝑚𝐲=[1𝑇𝑚𝐲1𝑇𝑚]𝑇 is the concatenation of the received signals. The space-time LMMSE filter is expressed as 𝐰=𝐇𝐇𝐻+𝑁0𝐸𝑐𝐈1𝐇𝐸+𝐿,(4) where 𝐇𝐇=[1𝐇2]𝑇. Its size is 2(2𝐸+1)×(2𝐸+𝐿). 𝐇𝐸+𝐿 is the (𝐸+𝐿)th column of the matrix 𝐇, and 𝐸𝑐 is the total chip energy. After chip equalization, the despreading process is performed. The resulting signal is then used to compute LLR values which are need by turbo decoding.

When HARQ soft bit-level combining is considered, chip equalization, despreading, and LLR values computation are performed individually for each HARQ transmission. If a block is erroneous after turbo decoding, its corresponding LLRs are saved to be combined with those of retransmitted block [5].

4. Chip-Level Combining

In the chip-level combining approach, each HARQ transmission is seen as two additional receive antennas. The transmissions are jointly exploited by the LMMSE chip equalizer as shown in Figure 1. Let 𝐲𝑚(𝑝,𝑞) denote the received vector of the 𝑚th chip on the 𝑝th antenna at 𝑞th HARQ transmission, and 𝐧𝑚(𝑝,𝑞) denote the noise vector corresponding to the 𝑚th chip on the 𝑝th antenna at 𝑞th HARQ transmission.

Figure 1: Chip-level combining.

The system model after 𝑗th transmission is expressed as (see [7]) 𝐘𝑚(𝑗)=𝐇(𝑗)𝐱𝑚+𝐧𝑚(𝑗),(5) where 𝐘𝑚(𝑗)=[(𝐲𝑚(1,1))𝑇,(𝐲𝑚(2,1))𝑇,,(𝐲𝑚(1,𝑗))𝑇,(𝐲𝑚(2,𝑗))𝑇], 𝐧𝑚(𝑗)=[(𝐧𝑚(1,1))𝑇,(𝐧𝑚(2,1))𝑇,,(𝐧𝑚(1,𝑗))𝑇,(𝐧𝑚(2,𝑗))𝑇], and 𝐇(𝑗) is the channel matrix after 𝑗th transmission. It is written as follows: 𝐇(𝑗)=𝐇(1,1)𝐇(2,1)𝐇(1,𝑗)𝐇(2,𝑗),(6) where 𝐇(𝑝,𝑞)(𝑝=1,2;𝑞=1,,𝑗) is a Toeplitz matrix of size (2𝐸+1)×(2𝐸+𝐿) given by 𝐇(𝑝,𝑞)=(𝑝,𝑞)𝐿10(𝑝,𝑞)000(𝑝,𝑞)𝐿10(𝑝,𝑞)000(𝑝,𝑞)𝐿10(𝑝,𝑞),(7)𝑙(𝑝,𝑞)(0𝑙𝐿1) in (7) are the channel taps associated to the 𝑝th receive antenna of the 𝑞th HARQ transmission. The time delay between two successive HARQ transmissions, round-trip delay (RTD), is taken into account in the propagation channel generation. HARQ transmissions are separately received in time by two receive antennas. At the receiver side, with the aid of a buffer and concatenation procedure expressed in (6), each HARQ transmission can be viewed as a source of two more virtual antennas. In other words, the delay diversity will translate into space diversity which is exploited by a chip-level LMMSE equalizer. The resulting chip after LMMSE filter is expressed by 𝑥𝑚(𝑗)=𝐰(𝑗)𝐻𝐘𝑚(𝑗),(8) where 𝐰(𝑗) is written as 𝐰(𝑗)=𝐇(𝑗)𝐇(𝑗)𝐻+𝑁0𝐸𝑐𝐈1𝐇(𝑗)𝐸+𝐿=𝐀1𝐇(𝑗)𝐸+𝐿,(9) where 𝐇(𝑗)𝐸+𝐿 is the (𝐸+𝐿)th column of the matrix 𝐇(𝑗). The computation of the matrix inversion in (9) is done using the QR decomposition of the matrix 𝐀 [8].

Chip-level combining method can be implemented using a recursive technique. This allows to get similar computationnal complexity and a slightly increased memory requirement compared with soft bit-level combining where HARQ transmissions are separately equalized at the chip-level.

5. Simulation and Results

Computer simulations are done for HSUPA system. The transmitter is implemented according to 3GPP technical specifications [9]. The predefined modulation and coding schemes (MCSs) simulated in this work are shown in Table 1. For both MCSs two physical channels are spread with SF=2, and the two others are spread with SF=4. The transmission is done over a multipath channel which has a profile similar to that of ITU-Pedestrian B which is considered to be block fading. Because of the low mobility of HSUPA mobile, its speed is fixed at 3 Km/h. LMMSE chip filter of length 15 is applied for channel equalization. Perfect channel knowledge is assumed at the receiver. SISO decoding is performed using the Max-Log-MAP algorithm with eight iterations. In the following, we label the soft bit-level combining method, Method 1. The proposed combining method is labeled Method 2. Simulations are done for chase combining using Method 1 and Method 2. The two methods are compared in terms of block error rate (BLER) which is computed as function of received 𝐸𝑐/𝑁0 per antenna. Note that received 𝐸𝑐/𝑁0 is averaged over HARQ transmissions. Figure 2 shows the BLER results for MCS1. After two and three HARQ transmissions, we observe that Method 2 outperforms Method 1. A gain of 0.3 dB is provided after three transmissions for BLER=102. Figure 3 plots the BLER results, obtained with two and three HARQ transmissions for MCS2. It is seen that Method 2 provides a significant gain over Method 1 for two and three HARQ transmissions. The proposed technique (Method 2) offers an additional gain of 3dB at 102 with three HARQ transmissions. It is also observed that the performance obtained by Method 1 after three transmissions is reached by Method 2 with only two transmissions. This significant increase of chase combining efficiency with Method 2 is due to the space diversity offered by the receive antennas, and the time diversity provided by the chase algorithm. Moreover, the different transmissions are jointly exploited by the LMMSE chip equalizer which is an interference-resistant detector.

Table 1: MCSs configurations.
Figure 2: Simulation results for MCS1.
Figure 3: Simulation results for MCS2.

6. Conclusion

In this paper, we have proposed a new technique for HARQ chase combining based on the LMMSE chip equalizer in HSUPA system. In this method, each transmission is seen as two additional receive antennas at the input of the LMMSE filter. The proposed method has been compared with the soft bit-level combining for two and three transmissions. Simulation results have demonstrated a significant increase in chase combining efficiency when using the proposed method especially for 16-QAM modulation.


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