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Journal of Electrical and Computer Engineering
Volume 2011 (2011), Article ID 235843, 9 pages
http://dx.doi.org/10.1155/2011/235843
Research Article

Semidigital PLL Design for Low-Cost Low-Power Clock Generation

Institute of Microelectronics, Tsinghua University, Beijing 100084, China

Received 15 May 2011; Revised 5 September 2011; Accepted 9 September 2011

Academic Editor: Sudhakar Pamarti

Copyright © 2011 Ni Xu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Ni Xu, Woogeun Rhee, and Zhihua Wang, “Semidigital PLL Design for Low-Cost Low-Power Clock Generation,” Journal of Electrical and Computer Engineering, vol. 2011, Article ID 235843, 9 pages, 2011. doi:10.1155/2011/235843