Research Article  Open Access
Den Satipar, Pattana Intani, Winai Jaikla, "Electronically Tunable Quadrature Sinusoidal Oscillator with Equal Output Amplitudes during Frequency Tuning Process", Journal of Electrical and Computer Engineering, vol. 2017, Article ID 8575743, 10 pages, 2017. https://doi.org/10.1155/2017/8575743
Electronically Tunable Quadrature Sinusoidal Oscillator with Equal Output Amplitudes during Frequency Tuning Process
Abstract
A new configuration of voltagemode quadrature sinusoidal oscillator is proposed. The proposed oscillator employs two voltage differencing current conveyors (VDCCs), two resistors, and two grounded capacitors. In this design, the use of multiple/dual output terminal active building block is not required. The tuning of frequency of oscillation (FO) can be done electronically by adjusting the bias current of active device without affecting condition of oscillation (CO). The electronic tuning can be done by controlling the bias current using a digital circuit. The amplitude of two sinusoidal outputs is equal when the frequency of oscillation is tuned. This makes the sinusoidal output voltages meet good total harmonic distortions (THD). Moreover, the proposed circuit can provide the sinusoidal output current with high impedance which is connected to external load or to another circuit without the use of buffer device. To confirm that the oscillator can generate the quadrature sinusoidal output signal, the experimental results using VDCC constructed from commercially available ICs are also included. The experimental results agree well with theoretical anticipation.
1. Introduction
Quadrature sinusoidal oscillators are very important circuits in numerous applications such as communication, sound system, instrumentation, control system. Especially in modulation system, the quadrature oscillator is used to generate the carrier signal for quadrature amplitude modulation (QAM) and singlesideband modulation (SSB) [1, 2]. Most of sinusoidal oscillator designs required the following features: low THD of the quadrature sinusoidal output, independent control of frequency of oscillation (FO) and condition of oscillation (CO) [3], using minimum number of active and passive element [4], electronic controllability [5] and so on. However, the amplitude of quadrature sinusoidal output should be considered too. To avoid the use of external amplifier, the expected amplitude of quadrature output should be equal for all frequency or during tuning FO.
The design of electronic circuit in analog signal processing has been emphasized in the use of active building block [6–8]. Particularly, the electronically tunable active building blocks have attracted significant research attention since analog circuits using electronically tunable active building block give more finetuning than adjusting the value of passive device. The voltage differencing current conveyor (VDCC) [9, 10] is a recently reported versatile active building block used in the realization of analog signal processing circuits. VDCC is also attractive due to its capability of electronic controllability. The analog circuits using VDCC as active element have been found in the literature, for examples, universal filter [11–14], firstorder allpass filter [15], ladder filter [16], passive element simulator [10, 17–21], and square and triangular wave generator [22]. The VDCCbased sinusoidal oscillators have been proposed in [19, 23–26]. In [19], the Colpitts oscillator using VDCCbased capacitance multiplier was proposed. In this oscillator, the FO and CO can be independently tuned. It can provide quadrature output waveform but the amplitude of quadrature output voltage is not equal during tuning the frequency. Also it requires dual output terminal VDCC ( and terminal). The simple currentmode oscillator using single VDCC and grounded passive elements was presented in [23]. The FO and CO can be orthogonally controlled. The currentmode quadrature sinusoidal waveform is obtained. However, the FO cannot be electronically tuned without affecting CO. Also the amplitude of quadrature output waveform is not equal during tuning the frequency. The simple voltagemode quadrature oscillator using single VDCC, two grounded resistors, and two grounded capacitors was implemented in [24]. The FO and CO can be orthogonally controlled. The FO can be electronically tuned without affecting the CO. However, the amplitude of quadrature output waveform is not equal during tuning the frequency. In [25], the quadrature oscillator using two VDCC, two grounded resistors, and two grounded capacitors was presented. The FO and CO can be independently/electronically controlled. However, the amplitude of quadrature output waveform is not equal during tuning the frequency. In [26], the quadrature oscillator using single controlled gain VDCC (CGVDCC) and two grounded capacitors was presented. The FO and CO can be independently/electronically controlled. However, the amplitude of quadrature output waveform is not equal during tuning the frequency. Also the internal construction of CGVDCC using the commercially available ICs is quite complicated.
The idea behind this work is to present the quadrature sinusoidal oscillator emphasized on the use of VDCC as active element. The amplitude of quadrature output waveform is equal during tuning of frequency. Also, the frequency of oscillation can be electronically tuned without affecting the condition of oscillation.
2. Proposed Circuit and Operation
2.1. Voltage Differencing Current Conveyor (VDCC)
In this design, the active building block (ABB) called voltage differencing current conveyor (VDCC) is used as main active device. The international construction of CMOS VDCC was proposed by Kaçar et al. [10] in 2014. It is fiveport device, namely, , , , , and port. The high impedance voltage input ports are and . The high impedance current output ports are and port. The low impedance voltage output port is port. In the original version of VDCC the output current at port provides the output current both positive and negative direction called and ports. However, in this purpose, only single port is required. This can reduce the current tracking error at port and can reduce the number of transistor in VDCC. The electrical symbol and equivalent circuit of VDCC are shown in Figure 1. The ideal electrical properties of VDCC are shown inwhere is the transconductance gain. For CMOS VDCC, is controlled by DC bias current I_{B} as follows:where is bias current, is mobility of the carrier for MOS transistors, is gateoxide capacitance per unit area, is effective channel width, and is effective channel length, respectively. The internal construction of CMOS VDCC is shown in Figure 2 [10]. The VDCC can be constructed from commercially available ICs as shown in Figure 3. It consists of LM13700 [27] and AD844 [28]. This construction contains only single terminal. for this construction is given aswhere is the thermal voltage.
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2.2. Proposed Oscillator
The proposed oscillator consists of two VDCCs, two resistors, and two grounded capacitors. The quadrature output voltages and are the voltage dropped at port of VDCC1 and VDCC2, respectively. However, the output voltages are taken from the nonlowimpedance output nodes, so the voltage buffers are needed for cascading. The output current with high impedance flows from port of VDCC2. Taking into consideration the ideal port characteristics involved in VDCC as referred above (2) and the relevant notations appearing in Figure 4, the characteristic equation is as follows:From (4), the frequency of oscillation is given asSubsequently, the condition of oscillation is given asIt is evident from (5) and (6) that the frequency of oscillation can be controlled by and without affecting the condition of oscillation. Moreover, the frequency of oscillation can be electronically tuned via and . If , the frequency of oscillation is rewritten asFrom the circuit in Figure 4, the voltage ratio of and is as follows:It is found from (8) that the output voltages and are 90degree phase difference which is called quadrature signal. The phase of output voltage leads the phase of output voltage to 90 degrees. At frequency of oscillation (), the magnitude of output voltage ratio in (8) becomesSubstituting (7) into (9), the magnitude of output voltage ratio in (9) becomesIf and , the magnitude of output voltage ratio is equal to unity. Therefore, the tune of frequency of oscillation with electronic method can simultaneously change and to keep the amplitude of output voltages and equal. This makes the sinusoidal output voltages meet low total harmonic distortions (THD). Moreover, if VDCC is constructed from commercially available ICs as illustrated in Figure 3 where its is linearly tuned by bias current, the frequency of oscillation can be linearly controlled.
3. Analysis of Frequency Stability
The analysis of frequency stability of the proposed circuit is done by using the definition of the frequency stability factor () given in [29, 30]where is normalized frequency and is the phase expression of the open loop transfer function of circuit in Figure 4 and its transfer function is expressed as follows: With the above definition, the frequency stability factor of the proposed oscillator is given aswhere , , , and .
4. Effect of Nonideal Current/Voltage Gains and Parasitic Elements
Practically, the influence of nonideal current/voltage gain and parasitic element in VDCC will affect the performances of the proposed oscillator. Considering the these gains, the electrical properties of VDCC are given as , , and , where and represent the voltage and current gain error, respectively. At high impedance ports , , , and , a parallel parasitic combination of a resistance and a capacitance appears and they are denoted as , , , , , , , and , respectively. At low impedance port , a series parasitic resistance appears and it is denoted as . These parasitic impedances affect the performance of the proposed oscillator. Taking them into account, the characteristic equation of the circuit in Figure 4 is obtained aswhere , , , and . If the operational frequency , the characteristic equation in (13) becomeswhere , , and . From (14), the frequency of oscillation is obtained asSubsequently, the condition of oscillation is given asFrom the circuit in Figure 4, the nonideal voltage ratio of and is as follows:Substituting (16) into (18), the magnitude of output voltage ratio in (18) becomesIt is found in (19) that although , , and , the magnitude of output voltage ratio is not equal to unity. According to (19), the phase response of to becomes
5. Experimental Results
In order to verify the performances of the proposed oscillator in Figure 4, the experiment was performed by using VDCC constructed from commercially available ICs, LM13700 from Texas Instruments Incorporated and AD844 from Analog Devices, Inc. as illustrated in Figure 3. The power supply voltages of experiment were ±5 V. The oscillator was designed to obtain the frequency of oscillation, kHz. From (7), an experimental setup was made by taking nF, kΩ, kΩ, and μA. With the above component values, the experimented frequency of oscillation becomes kHz. The deviation of theoretical and experimental frequency of oscillation is about 6%. The deviation of theoretical and experimental value stems from the parasitic resistances and capacitances as shown in (16). However, kHz was obtained when and were set as 180 μA. The measured sinusoidal quadrature waveforms , and their frequency spectrums are illustrated in Figure 5. The output current waveform and its spectrum which is measured from the voltage dropped on load resistor 10 kΩ are depicted in Figure 6. To obtain the frequency of oscillation 0 kHz, the bias currents and were set to 370 μA. Figure 7 represents the output waveforms and and their frequency spectrums. The output current waveform and its spectrum at kHz is depicted in Figure 8. Tuning of experimental and theoretical FO is shown in Figure 9, where and are equal and were adjusted from 100 μA to 500 μA. The range of FO controlled from 27 kHz–131 kHz was obtained. Figure 10 shows simulated dependence of output amplitudes and on FO. It can be clearly seen that the ratio of amplitudes and is quite constant on the tuning of FO if and are simultaneously tuned as predicted in (10). As stated above, VDCC consists of operational transconductance amplifier (OTA) where it is well known that the BJT OTA gives the linear range if input voltage is lower than (≅52 mV). With the result in Figure 10, it is found that the amplitude of output voltages which dropped on input voltage of OTA is close to linear range of OTA. This implies that sinusoidal output waveforms provide good THD. However, at high value of bias current, the deviation of amplitude ratio of and obviously appears. This phenomenon results from the fact that the increment of bias current will decrease the value of parasitic resistance. Therefore, the amplitude of and is slightly different as analyzed in (19). The measured phase difference between the two outputs, and , is illustrated in Figure 11.
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6. Comparison with Recent Quadrature Oscillators
A comparison between the proposed quadrature oscillator and recent quadrature oscillator published in scientific journals is shown in Table 1. The terms that will be taken into account are as follows: the used active building block (ABB), number of active and passive element, the way to tune FO and CO, amplitude of the quadrature output waveforms during tuning process, the used ABB without multiple or extra terminals, additional current output with high impedance, the connection of capacitors, and the way to test the circuit.

7. Conclusion
In this contribution, the quadrature sinusoidal oscillator using voltage differencing current conveyor as active element is presented. The proposed circuit comprises two VDCCs, two resistors, and two grounded capacitors. The proposed oscillator provides quadrature voltage output and a high impedance current output. The frequency of oscillation can be electronically tuned without affecting the condition of oscillation. During tuning of the frequency of oscillation, the amplitude of the quadrature output voltages and is almost constant with slight differences due to the effect of the parasitic resistances and capacitances of the VDCC. The experimental results using VDCC constructed from commercially available ICs confirm the performance of the theoretical analysis.
Conflicts of Interest
The authors declare that they have no conflicts of interest.
Acknowledgments
Research described in this paper was financially supported by King Mongkut’s Institute of Technology Ladkrabang (KMITL) and by National Research Council of Thailand (NRCT), Grant no. A11859028.
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Copyright
Copyright © 2017 Den Satipar et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.