Design and Implementation of ALU Using Graphene Nanoribbon Field-Effect Transistor and Fin Field-Effect Transistor

Table 3

Operation of 4-bit DCRAM.

Operation								Comments
								Input
								Input
	1’b0							Partial products generated and inputs to 1^st stage 4-bit DCRHA
									Sum generated from first stage 4-bit DCRHA and applied as input to second stage 4-bit DCRHA
								Partial products
								Repeat the process until (N-1) number of addition stages are completed.
								Final product bits