Research Article
A 2 GSps, 8-Bit Folding and Interpolation ADC with Foreground Calibration in 90 nm CMOS Technology
Table 1
Postsimulation results of F&I ADC and comparison with others.
| Performance | [3] | [4] | [5] | [6] | This work |
| Technology | 0.18 μm CMOS | 0.18 μm CMOS | 90 nm CMOS | 90 nm CMOS | 90 nm CMOS | Supply (V) | 1.8 | 1.8 | 1 | 1.2 | 1.2 | Clock (GHz) | 1.6 | 1 | 2.7 | 1 | 2 | SFDR (dB) | 56 | 68.6 | | 28.87 | 50.84 | SNDR (dB) | 46 | 56.5 | 33.6 | 27.35 | 45.93 | Power (mW) | 774 | 1260/channel | 50 | 7.65 | 210 | Area (mm2) | 3.6 | 49 (dual ADC) | 0.36 | 0.063 | 0.865 |
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