Mathematical Control of Complex Systems 2013View this Special Issue
Research Article | Open Access
Analysis of the Degradation of MOSFETs in Switching Mode Power Supply by Characterizing Source Oscillator Signals
Switching Mode Power Supply (SMPS) has been widely applied in aeronautics, nuclear power, high-speed railways, and other areas related to national strategy and security. The degradation of MOSFET occupies a dominant position in the key factors affecting the reliability of SMPS. MOSFETs are used as low-voltage switches to regulate the DC voltage in SMPS. The studies have shown that die-attach degradation leads to an increase in on-state resistance due to its dependence on junction temperature. On-state resistance is the key indicator of the health of MOSFETs. In this paper, an online real-time method is presented for predicting the degradation of MOSFETs. First, the relationship between an oscillator signal of source and on-state resistance is introduced. Because oscillator signals change when they age, a feature is proposed to capture these changes and use them as indicators of the state of health of MOSFETs. A platform for testing characterizations is then established to monitor oscillator signals of source. Changes in oscillator signal measurement were observed with aged on-state resistance as a result of die-attach degradation. The experimental results demonstrate that the method is efficient. This study will enable a method to predict the failure of MOSFETs to be developed.
With the rapid development of power electronic technology, SMPS has come to play an important role in electronic equipment. Since the 1970s, SMPSs have been widely used in aeronautics, nuclear power, high-speed railways, and other areas related to national strategy and security.
The failure of SMPS will lead to downtime in electronic systems and cause catastrophic accidents. A recent statistic indicates that approximately 34% of electronic system failures result from the failure of SMPS . Therefore, predicting the impending failure of SMPS is a challenging problem.
The increasing dependence on SMPS, particularly in mission-critical applications, has created an urgent need for real-time techniques that detect incipient faults. According to statistics on the failure of devices relating to two topological structures of DC/DC power supply, the component most prone to failure in switch-mode drives is the controllable power semiconductor (i.e., IGBT and MOSFETs) . In this paper, the focus is on power semiconductors, MOSFETs. Previous work on MOSFETs has focused primarily on three aspects. The first is the reliability design of these components . The second is on predicting the remaining useful life of MOSFETs using off-line accelerated aging tests . An accelerated aging system for the prognostics of discrete power semiconductor devices was built in . Based on accelerated aging with an electrical overstress on MOSFETs, predictions by gate-source voltage are made in . In , collector-emitter voltage is identified as a health indicator. In , the maximum peak current of the collector-emitter ringing at the turn-off transient is identified as the degradation variable. The third aspect of focus is on the development of degradation models. Degradation models are set up according to the function of the usage time based on accelerated life tests . For example, gate structure degradation modeling of discrete power MOSFETs under ion impurities was presented in . In brief, traditional studies on the degradation of MOSFETs have focused on analyzing nonreal-time data. Predictions of the remaining useful life of MOSFETs have been based on off-line, statistical analyses.
In this paper, the focus is on the detection of incipient faults and on analyzing aging. The primary goal is to realize on-line fault prediction and evaluate the remaining useful life of MOSFETs. The approach that is followed is to use the pulse-width modulation (PWM) signals. PWM is a succession of step functions. The natural characteristic response (oscillator signal) of the source is the output signal. By analyzing the source signal, the paper establishes key parameters of failure related to the natural characteristic response. The key parameters of failure then become the main indicators of the component’s state of health. Compared with other methods, the approach has the following several advantages. First, the primary advantage is that there is no need to bring in additional signals. Second, not only can real-time measurements of input and output voltage be realized, but data can also be synchronously processed. Timely judgments and predictions can be made about the state of MOSFETs. Finally, the method is an integration of signal processing with an analytical model. As far as the degradation of MOSFETs is concerned, this is a new perspective. This introductory section is followed by Section 2, which begins by addressing the basic failure mechanism. A nonidealized model of MOSFETs is then introduced. In Section 3, the generation mechanism of oscillator signal and the relationship with key parameters of failure are discussed. In Section 4, the experimental framework is established and the testing procedure is described. In Section 5, the results of the study are summarized and future work is discussed.
2. The Failure Mechanism and a Nonidealized Model of MOSFETs
MOSFETs were first developed in the 1970s. They soon replaced power bipolar junction transistors (BJTs). Unlike BJTs, which are current controlled, MOSFETs are voltage controlled and hence require a simple gate driver circuit. Due to the high current-density capability, low switching loss, and high input impedance of MOSFETs, they are the key components in power conversions. MOSFETs play an especially important role in high-frequency power conversions.
In SMPS, MOSFETs are mainly used for switching. When the MOSFETs are in the on-state, they exhibit resistance between the drain and source terminals. As shown in Figure 1, this resistance is called , after the drain-to-source resistance in the on-state. is the sum of many elementary contributions .
is the source resistance. It represents resistances between the source terminals of the package to the channel of the MOSFETs. is the channel resistance. For a given die size, it is inversely proportional to the channel width and to the channel density. For low-voltage MOSFETs, the channel resistance is one of the main contributors to the . A great deal of work has been carried out to reduce the cell size of low-voltage MOSFETs in order to increase the channel density. is the access resistance. It represents the resistance of the epitaxial zone directly under the gate electrode, where the direction of the current changes from horizontal (in the channel) to vertical (to the drain contact). is the detrimental effect of the reduction in cell size mentioned above. The implantations form the gates of a parasitic transistor that tend to reduce the width of the current flow. is the resistance of the epitaxial layer. As the role of this layer is to sustain the blocking voltage, is directly related to the voltage rating of the device. A high-voltage MOSFET requires a thick, low-doped layer (i.e., highly resistive), whereas a low-voltage transistor only requires a thin layer with a higher doping level (i.e., less resistive). As a result, is the main factor responsible for the resistance of high-voltage MOSFETs. is the equivalent of for the drain. It represents the resistance of the transistor substrate and of the package connections.
In the various aging mechanisms, thermal stress and electrical overstresses are the most common suspects. Both of these mechanisms cause the on-state resistance to increase. In the case of thermal stress, the total on-state resistance increases as a result of a reduction in the mobility (µ) of the charge carriers . This mobility reduction is attributed to an increase in the scattering of charge carriers with temperature. The decrease in mobility with temperature is based on the material properties and doping levels of the semiconductor. These changes cause the switch characteristics to change and lead to premature failure. is the key indicator of the degradation and state of health of MOSFETs . When MOSFETs degrade, on-state resistance will increase.
The equivalent circuit model of MOSFETs is shown in Figure 2 . In the MOSFETs datasheets, when drain and source terminals are shorted, the input capacitances are often named . The output capacitances are named (gate and source shorted), and the reverse transfer capacitances are named (gate and source shorted). The relationship between these capacitances and those described is as follows :
, , and are the gate-to-source, gate-to-drain, and drain-to-source capacitances, respectively . is the on-state resistance. Considering the effect of the distribution parameters, is the source parasitic inductance. Diode is the body diode.
3. Analysis of the Characterization of the Source Oscillator Signal
When MOSFETs turn on, the step inputs drive the gate. The high level of the step signal is set as . When MOSFETs are suddenly subjected to step inputs, the parasitic capacitance starts charging. The charging voltage produces a relatively high . The value of is related to the switching speed. The relationship between these two quantities can be expressed approximately as
and are the corresponding voltage and conduction time, respectively. Thus, the source displacement current introduced by can be expressed as:
Between drain and source, due to parasitic capacitance , on-state resistance , and distribution inductance , the source will produce an oscillator signal. The source voltage can be expressed as
The characteristic equation (4) is a second-order system. is the system transfer function in the frequency domain. When the discriminator is less than zero, the Laplace inverse transform can be expressed as where
Equation (5) represents the damping oscillation curve. The envelope of damping oscillation can be expressed as
The damping coefficient is shown below in (8) as follows:
The oscillation frequency can be expressed as
Because is far less than , the oscillation frequency can be expressed as
When MOSFETs begin degrading, will increase. The oscillation envelope of damping oscillation will change. Thus, by the real-time monitoring of the source damping oscillation signal, we can obtain the trend in the variation of the key parameter . From the change in , the paper can estimate the state of health of MOSFETs. By means of the above, the prognostics and health management of SMPS are realized.
4. Physics Experiments and the Results of the Data Analysis
4.1. Signal Acquisition Experiments
To monitor the oscillation signal and compute the degradation parameter , an aging experimental platform is established. The physics experiments are performed in specialized laboratories. The experimental setup mainly consists of a gate drive board, a main board, a PXI device, and a host computer. The PXI device mainly realizes data acquisition on the basis of LabVIEW 2012. The host computer realizes data processing based on MATLAB 7.0. The main board is a Buck circuit. The input voltage is biased at 6?V?dc. The gate drive voltage is produced by a function generator. The gate voltage is a square wave signal with an amplitude of 0~10?V, a frequency of 40?K?Hz, and a duty cycle of 50%. The amplifier is used to ensure that enough current is available to charge the gate of MOSFETs.
The main board houses the terminal block for the MOSFETs device and the BNC output ports connected to the terminal block. The source-ground voltage (Vs), gate-ground voltage (Vg), drain-ground voltage (Vd), and drain-source current (Ids) are monitored in situ by the LabVIEW that controls the PXI data acquisition card. In order to ensure synchronous data acquisition, display, and processing, the system applies the producer/consumer mode in LabVIEW. In the circulation of producers, the experimental setup realizes the function of data acquisition and display. In the circulation of consumers, it realizes the function of data storage. Thermal stress is used in the study to cause device damage by applying a controlled temperature. The experimental setup used for the acquisition of signals is shown in Figure 3. The data display is shown in Figure 4.
4.2. Signal Processing Experiments and Degradation Analysis
The effects of the oscillator signal resulting from degraded MOSFETs are evaluated by preprocessing the data. As the MOSFETs age, will increase. An appreciable increase in the damping coefficient is observed. Figure 5 gives the flow chart for the processing of the data. First, the data is filtered using a first-order Butterworth low-pass filter. Second, the envelope of the oscillator signal is extracted. Then, the exponential damping of the “cftool toolbox” is used to conduct curve-fitting. Finally, according to (11), the value of on-state resistance is acquired.
After several rounds of processing, an oscillator signal of the source from MOSFETs in normal working condition is acquired. The oscillator signal and envelope are shown in Figure 6. The result of the FFT is shown in Figure 7. The fitting result is shown in Figure 8.
The fitting expression and goodness of fit when MOSFETs are in different states are shown in Table 1. The general model is an exponential model. It is shown in (12) that , , and are coefficients and is the damping coefficient. The evaluation standard for curve-fitting consists of SSE, -square, adjusted -square, and RMSE. SSE represents the sum of squares due to error. -square is the coefficient of determination. Adjusted -square represents the degree-of-freedom of the adjusted coefficient of determination. RMSE is the root-mean-square error.
With regard to the failure modes, the potential causes of failure involve high electric fields and high temperatures. In this study, MOSFETs are subjected to thermal overstress to degrade the parts. As the temperature increases, the oscillator signal and envelope will change. Because parasitic capacitance is not prone to damage, when the oscillation frequency remains the same, this means that the change in the envelope is mainly caused by . In Figure 9, the red and blue curves, respectively, indicate the oscillation signal in different degradation states. The black curve indicates the degradation of distribution inductance . When MOSFETs are different degradation states, the envelope of the oscillator signal and the result of the FFT are, respectively, shown in Figures 10 and 11.
Based on the results of curve-fitting, we obtain different s. When and are obtained, according to (11), the value of can be determined. The results are shown in Table 2, with the value of the datasheet given for comparison.
As MOSFETs age, will increase. An increasing means that the rate of oscillatory decay will increase. This means an increase in the damping coefficient . As seen in Table 2, when the error is defined as being close to 10%, MOSFETs begin to degrade from the state of normal. When the error is greater than or equal to 50%, MOSFETs fail.
In conclusion, through real-time monitoring and processing the oscillator signal of source, we can obtain the variation tendency of on-state resistance . Thus, we can predict the state of health of MOSFETs.
A nonidealized model and the degradation mechanism of MOSFETs were described in this paper. In the case of thermal stress, the total on-state resistance increases as a result of a reduction in the mobility (µ) of the charge carriers. Thus, in this study, on-state resistance was identified as the key indicator of the degradation and state of health of MOSFETs. According to the relationship between the oscillator signal and in turn-off, on-state resistance can be calculated in real-time. An experimental platform was established for the purpose of monitoring the oscillation signal and computing the degradation parameter . Without additional incentives, a standard signal was used to predict the state of degradation of MOSFETs in a Buck circuit. The bases for, and a method of, predicting the life and managing the health of MOSFETs were given in this study. Future work is still needed to construct a system for automatically predicting and giving early warnings about the life of MOSFETs.
This work received financial support from the National Natural Science Foundation of China (nos. 61070049 and 61202027), the National Key Technology R&D Project (no. 2012DFA11340), the Beijing Natural Science Foundation of China (no. 4122015), the Beijing City Board of Education Science and Technology Development Project (no. KM201210028001), and the Ladder Program of the Beijing Key Laboratory of Electronic System Reliability Technology. The authors also thank Professor Jin for his help throughout this study.
- Y. Guan, S. Jin, L. Wu, W. Pan, Y. Liu, and J. Zhang, “Power supply prognostics and health management of high reliability electronic systems in rugged environment,” Key Engineering Materials, vol. 474–476, pp. 1195–1200, 2011.
- J. M. Anderson, R. W. Cox, and J. Noppakunkajorn, “An on-line fault diagnosis method for power electronic drives,” in Proceedings of the 4th IEEE Electric Ship Technologies Symposium (ESTS '11), vol. 10, pp. 492–497, April 2011.
- T. Azoui, P. Tounsi, P. Dupuy, L. Guillot, and J. M. Dorkel, “3D Electro-thermal modelling of bonding and metallization ageing effects for reliability improvement of power MOSFETs,” Microelectronics Reliability, vol. 51, no. 9-11, pp. 1943–1947, 2011.
- V. Smet, F. Forest, J.-J. Huselstein et al., “Ageing and failure modes of IGBT modules in high-temperature power cycling,” IEEE Transactions on Industrial Electronics, vol. 58, no. 10, pp. 4931–4941, 2011.
- J. Celaya, P. Wysocki, and K. Goebel, “Accelerated aging system for prognostics of power semiconductor devices,” in IEEE Autotestcon, vol. 4, pp. 1–6, 2010.
- S. Saha, J. Celaya, V. Vashchenko, S. Mahiuddin, and K. Goebel, “Accelerated aging with electrical overstress and prognostics for power MOSFETs,” Energytech, vol. 47, pp. 1–6, 2011.
- N. Patil, J. Celaya, D. Das, K. Goebel, and M. Pecht, “Precursor parameter identification for insulated gate bipolar transistor (IGBT) prognostics,” IEEE Transactions on Reliability, vol. 58, no. 2, pp. 271–276, 2009.
- G. Sonnenfeld, K. Goebel, and J. R. Celaya, “An agile accelerated aging, characterization and scenario simulation system for gate controlled power transistors,” in IEEE Autotestcon, vol. 6, pp. 208–215, September 2008.
- A. Oukaour, B. Tala-Ighil, B. Pouderoux et al., “Ageing defect detection on IGBT power modules by artificial training methods based on pattern recognition,” Microelectronics Reliability, vol. 51, no. 2, pp. 386–391, 2011.
- A. E. Ginart, I. N. Ali, J. R. Celaya, and P. W. Kalgren, “Modeling SiO2 ion impurities aging in insulated gate power devices under temperature and voltage stress,” in Proceedings of the Annual Conference of the Prognostics and Health Management Society, vol. 7, pp. 1–6, 2010.
- Y. Zhang, R. Zane, A. Prodic, R. Erickson, and D. Maksimovic, “Online calibration of MOSFET on-state resistance for precise current sensing,” IEEE Power Electronics Letters, vol. 2, no. 3, pp. 100–103, 2004.
- J. R. Celaya, A. Saxena, P. Wysocki, S. Saha, and K. Goebel, “Towards prognostics of power MOSFETs: accelerated aging and precursors of failure,” in Proceedings of the Annual Conference of the Prognostics and Health Management Society, vol. 5, pp. 1102–1108, 2010.
- T. Funaki, H. Arioka, and T. Hikihara, “The influence of parasitic components on power mosfet switching operation in power conversion circuits,” IEICE Electronics Express, vol. 6, no. 23, pp. 1697–1701, 2009.
- Y. Xiao, H. Shah, T. P. Chow, and R. J. Gutmann, “Analytical modeling and experimental evaluation of interconnect parasitic inductance on MOSFET switching characteristics,” in Proceedings of the 19th Annual IEEE Applied Power Electronics Conference and Exposition (APEC '04), vol. 1, pp. 516–521, February 2004.
- Z. John Shen, Y. Xiong, X. Cheng, Y. Fu, and P. Kumar, “Power MOSFET switching loss analysis: a new insight,” in Proceedings of the 41st IAS Annual Meeting on Industry Applications Conference, vol. 3, pp. 1438–1442, October 2006.
- N. Phankong, T. Funaki, and T. Hikihara, “Characterization of the gate-voltage dependency of input capacitance in a SiC MOSFET,” IEICE Electronics Express, vol. 7, no. 7, pp. 480–486, 2010.
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