Designing a Ring-VCO for RFID Transponders in 0.18 𝝁m CMOS Process

Table 1

Performance comparisons of CMOS ring-VCO.

Architecture	Operating frequency; (GHz)	Tuning range; (GHz)	Phase noise; (dBc/Hz)	Offset; (MHz)	Supply voltage; (V)	Power; (mW)	FOM; (dBc/Hz)	CMOS process; (μm)	Published year,; [Ref.]
2-stage, single delay loop	0.85	0.186–1.5	−113.5	0.6	1.8	11.38	−165.96	0.18	2008, [12]
3-stage, dual delay loop	4.09	0.479–4.09	−94.08	1	1	10	−156.28	0.18	2011, [13]
4-stage, dual delay loop	—	1.77–1.92	−123.4	10	1.8	13	—	0.18	2011, [14]
3-stage, single delay loop	2.4	2.34–3.11 (24.75%)	−113	10	1.05	2	−157.6	0.13	2011, [15]
3-stage, single delay loop	0.866	0.381–1.15	−126	10	3.3	7.48	−156	0.35	2012, [16]
3-stage, single delay loop	2.42	0.5–2.54; (80%)	−126.4; −118	25; 10	1.5	2.47	−162.4; −161.74	0.18	Proposed; work