A Test Data Compression Scheme Based on Irrational Numbers Stored Coding

Table 5

Comparison with other algorithms (the hard fault set).

Circuit	Size of TD bit	FDR	AR	ARL	Scheme presented
					Size/bit	α%
S5378	5992	1110	1160	1091	710	88.15
S9234	73112	22038	21222	20429	11982	83.61
S13207	220500	14080	15534	15061	7500	96.60
S15850	163748	14370	13286	12861	15183	90.73
S38417	2201472	103760	94682	90397	103779	95.29
S38584	456768	13840	15696	15083	12551	97.25