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VLSI Design
Volume 1 (1994), Issue 4, Pages 335-343
http://dx.doi.org/10.1155/1994/82606

An Approach for Self-Checking Realization of Interacting Finite State Machines

Department of Electrical Engineering, North Carolina A&T State University, Greensboro, USA

Copyright © 1994 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

This paper presents a technique for designing interacting finite state machines which will be totally self-checking for any single stuck-at fault. In the proposed technique m-out-of-n codes are used for both primary output and state assignments. In addition, the next state logic (NSL) for each submachine and the output logic (OL) are realized such that any single stuck-at fault results in either single bit error or unidirectional multibit error at the output. The proposed technique does not have any restriction on the way the NSL and the OL are implemented.