Table of Contents
VLSI Design
Volume 12, Issue 3, Pages 449-455
http://dx.doi.org/10.1155/2001/25179

Simultaneous Switching Noise Minimization Technique Using Dual Layer Power Line Mutual Inductors

VLSI Design Lab., Dept. of Electronic Engineering, Hallym University, Chunchon 200-702, South Korea

Received 20 June 2000; Revised 3 August 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Yongha Lee, Jongho Choi, Gyu Moon, and Jeomkeun Kim, “Simultaneous Switching Noise Minimization Technique Using Dual Layer Power Line Mutual Inductors,” VLSI Design, vol. 12, no. 3, pp. 449-455, 2001. https://doi.org/10.1155/2001/25179.