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VLSI Design
Volume 13, Issue 1-4, Pages 349-354
http://dx.doi.org/10.1155/2001/35094

Approximation of the BTE by a Relaxation-time Operator: Simulations for a 50 nm-channel Si Diode

1Dipartimento di Matematica, Universit√° di Catania, Italy
2Department of Mathematics, University of Texas at Austin, USA
3Department of Mathematics, University of Texas at Austin, USA
4Division of Applied Mathematics, Brown University, Providence, RI 02912, USA
5Departamento de Matematica Aplicada, Universidad de Granada, Granada 18071, Spain

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Marcello A. Anile, Jose A. Carrillo, Irene M. Gamba, and Chi-Wang Shu, “Approximation of the BTE by a Relaxation-time Operator: Simulations for a 50 nm-channel Si Diode,” VLSI Design, vol. 13, no. 1-4, pp. 349-354, 2001. https://doi.org/10.1155/2001/35094.