Table of Contents
VLSI Design
Volume 12, Issue 4, Pages 527-536
http://dx.doi.org/10.1155/2001/83474

A Fine Grain Configurable Logic Block for Self-checking FPGAs

1Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, AR 72701, USA
2Department of Electrical Engineering, North Carolina A&T State University, Greensboro, NC 27411, USA

Received 15 August 1999; Revised 11 September 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

P. K. Lala and A. Walker, “A Fine Grain Configurable Logic Block for Self-checking FPGAs,” VLSI Design, vol. 12, no. 4, pp. 527-536, 2001. https://doi.org/10.1155/2001/83474.