An Approach for Implementing State Machines with Online Testability

Table 2

Number of transistors and flip-flops needed for implementing MCNC benchmark circuits.

	NSL	OL	XOR	PAR	TOTAL	Flip-Flops
cse	225	314	56	48	643	15
ex1	248	762	56	48	1114	15
dk16	280	286	64	56	686	17
dk17	192	240	40	32	504	11
donfile	240	0	64	56	360	17