VLSI Design

VLSI Design / 2010 / Article / Fig 3

Research Article

Linearity Analysis on a Series-Split Capacitor Array for High-Speed SAR ADCs

Figure 3

Behavioral simulations comparing the linearity of the SSC and the SC array.

We are committed to sharing findings related to COVID-19 as quickly and safely as possible. Any author submitting a COVID-19 paper should notify us at help@hindawi.com to ensure their research is fast-tracked and made available on a preprint server as soon as possible. We will be providing unlimited waivers of publication charges for accepted articles related to COVID-19.