Table of Contents
VLSI Design
Volume 2012, Article ID 242989, 10 pages
Research Article

Low Cost Design of a Hybrid Architecture of Integer Inverse DCT for H.264, VC-1, AVS, and HEVC

Department of Electrical and Computer Engineering, University of Saskatchewan, Saskatoon, SK, Canada S7N 5A9

Received 2 December 2011; Accepted 6 March 2012

Academic Editor: Maurizio Martina

Copyright © 2012 Muhammad Martuza and Khan A. Wahid. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [4 citations]

The following is the list of published articles that have cited the current article.

  • Muhammad Martuza, Carl McCrosky, and Khan Wahid, “A fast hybrid DCT architecture supporting H.264, VC-1, MPEG-2, AVS and JPEG codecs,” 2012 11th International Conference on Information Science, Signal Processing and their Applications, ISSPA 2012, pp. 545–549, 2012. View at Publisher · View at Google Scholar
  • Ercan Kalali, Erdem Ozcan, Ozgun Yalcinkaya, and Ilker Hamzaoglu, “A low energy HEVC inverse transform hardware,” IEEE Transactions on Consumer Electronics, vol. 60, no. 4, pp. 754–761, 2014. View at Publisher · View at Google Scholar
  • Po-Hung Chen, Hung-Ming Chen, and Ing-Chao Lin, “A Systematic Hardware Sharing Method for Unified Architecture Design of H.264 Transforms,” Mathematical Problems in Engineering, vol. 2015, pp. 1–14, 2015. View at Publisher · View at Google Scholar
  • Kiho Choi, Euee S. Jang, and Sang-hyo Park, “Zero coefficient-aware fast butterfly-based inverse discrete cosine transform algorithm,” IET Image Processing, vol. 10, no. 2, pp. 89–100, 2016. View at Publisher · View at Google Scholar