VLSI Design

Advanced VLSI Architecture Design for Emerging Digital Systems


Publishing date
26 Sep 2014
Status
Published
Submission deadline
09 May 2014

Lead Editor

1Department of Electronic Engineering, National Taipei University of Technology, Taipei, Taiwan

2Department of Electrical and Computer Engineering, University of New Hampshire, Durham, NH 03824, USA

3Department of Electrical Engineering and Information Technology, Hochschule Darmstadt/University of Applied Sciences, Darmstadt, Germany

4Department of Electrical Engineering, National Ilan University, Yilan, Taiwan

5Division for Biomedical 8 Industrial IC Technology, Industrial Technology Research Institute, Hsinchu, Taiwan


Advanced VLSI Architecture Design for Emerging Digital Systems

Description

With physical feature sizes in VLSI designs decreasing rapidly, existing efficient architecture designs need be reexamined. Advanced VLSI architecture designs are required to further reduce power consumption, compress chip area, and speed up operating frequency for high-performance integrated circuits. With time-to-market pressure and rising mask costs in the semiconductor industry, engineering change order (ECO) design methodology plays a main role in advanced chip design. Digital systems such as communication and multimedia applications demand advanced VLSI architecture design methodologies so that low power consumption, small area overhead, high speed, and low cost can be achieved.

This special issue is dedicated to aspects of VLSI architecture design and their applications. Special interest focuses on emerging digital systems. The authors working in this area are strongly encouraged to submit original research papers, as well as review articles. Potential topics include, but are not limited to:

  • Engineering change order (ECO) for VLSI design
  • Low power VLSI architecture design for digital systems
  • High speed VLSI architecture design for digital systems
  • Area efficient VLSI architectures for digital systems
  • Fault tolerance and error control for digital systems
  • Novel reconfigurable and programmable architectures for emerging digital systems
  • On-chip communication design for emerging digital systems

Before submission authors should carefully read over the journal’s Author Guidelines, which are located at http://www.hindawi.com/journals/vlsi/guidelines/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/submit/journals/vlsi/avad/ according to the following timetable:


Articles

  • Special Issue
  • - Volume 2014
  • - Article ID 746132
  • - Editorial

Advanced VLSI Architecture Design for Emerging Digital Systems

Yu-Cheng Fan | Qiaoyan Yu | ... | Chih-Cheng Lu
  • Special Issue
  • - Volume 2014
  • - Article ID 698041
  • - Research Article

Engineering Change Orders Design Using Multiple Variables Linear Programming for VLSI Design

Yu-Cheng Fan | Chih-Kang Lin | ... | Hung-Kuan Liu
  • Special Issue
  • - Volume 2014
  • - Article ID 531653
  • - Research Article

Design of Smart Power-Saving Architecture for Network on Chip

Trong-Yen Lee | Chi-Han Huang
  • Special Issue
  • - Volume 2014
  • - Article ID 406416
  • - Research Article

Optimization of Fractional-N-PLL Frequency Synthesizer for Power Effective Design

Sahar Arshad | Muhammad Ismail | ... | Qaiser Ijaz
  • Special Issue
  • - Volume 2014
  • - Article ID 380362
  • - Research Article

Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits

Shikha Panwar | Mayuresh Piske | Aatreya Vivek Madgula
  • Special Issue
  • - Volume 2014
  • - Article ID 529392
  • - Review Article

Gate-Level Circuit Reliability Analysis: A Survey

Ran Xiao | Chunhong Chen
  • Special Issue
  • - Volume 2014
  • - Article ID 343960
  • - Research Article

Low-Area Wallace Multiplier

Shahzad Asif | Yinan Kong
  • Special Issue
  • - Volume 2014
  • - Article ID 652187
  • - Research Article

Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic

Wafi Danesh | Jaya Dofe | Qiaoyan Yu
  • Special Issue
  • - Volume 2014
  • - Article ID 801241
  • - Research Article

On-Chip Power Minimization Using Serialization-Widening with Frequent Value Encoding

Khader Mohammad | Ahsan Kabeer | Tarek Taha

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