Journal of Nanomaterials

Volume 2011, Article ID 268149, 5 pages

http://dx.doi.org/10.1155/2011/268149

## Toward 3D Integration of 1D Conductors: Junctions of InAs Nanowires

Division of Solid State Physics and The Nanometer Structure Consortium (nmC@LU), Lund University, P.O. Box 118, 221 00 Lund, Sweden

Received 5 July 2011; Accepted 23 August 2011

Academic Editor: Raymond Whitby

Copyright © 2011 Phillip M. Wu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

A vision and one of the next challenges in nanoelectronics is the 3D integration of nanowire building blocks. Here we show that capillary forces associated with a liquid-air meniscus between two nanowires provides a simple, controllable technique to bend vertical nanowires into designed, interconnected assemblies. We characterize the electric nature of the junctions between crossed nanowires in a lateral geometry, which is one type of basic unit that can be found in interconnected-bent vertical nanowires. The crossed nanowire junction is capacitive in nature, and we demonstrate that one nanowire can be used to field effect gate the other nanowire, allowing for the possibility to develop extremely narrow conducting channels in nanowire planar or 3D electronic devices.

#### 1. Introduction

Advances in fabrication techniques over the last decade have allowed researchers to exercise full creativity in developing novel nanometer size devices. One of the primary issues concerning nanostructures, however, is the ability to upscale to allow for more complex systems with specific function and easy integration with devices of larger dimensions. There have been promising results recently in this direction with the demonstration of controlled synthesis of self-assembled three-dimensional (3D) networks of interconnected one-dimensional (1D) nanowires, termed “nanotree” networks [1, 2]. These networks have the potential for upscaling into complex, integrated 3D nanoelectronics devices.

Networked nanowires present a natural system for studying electronic behavior in complex 3D junctions of 1D components. These 3D networks of 1D components could give rise to novel and unexpected collective transport properties. This expectation is reasonable as self-assembled junctions of two nanowires have been shown to exhibit unusual nonlinear electrical characteristics and signatures of ballistic transport [3, 4]. Understanding the electronic and spin behavior in such systems will be critical to further develop applications for nanoelectronic devices.

In this paper we report steps to achieve and characterize networked nanowires. We present a simple, controllable technique to bend vertical nanowires into contact. Positioning nanowire seed particles with lithography allows one to design various interconnected nanowire array geometries. Then we discuss transport measurements performed on crossed nanowires in a lateral geometry, which is one type of basic unit that can be found in interconnected-bent vertical networks of nanowires. We find that the crossed nanowire junction is capacitive in nature and demonstrate that one nanowire can be used to field-effect gate the other nanowire, allowing for the possibility to develop extremely short gates in nanowire planar or 3D electronic devices.

#### 2. Experimental Methods

InAs nanowires were grown in a high vacuum chemical beam epitaxy (CBE) unit on InAs (111) B wafers [5]. Gold (Au) aerosol particles or electron beam lithography (EBL) defined Au dots acted as catalysts to seed the growth. Tertiarybutylarsine (TBA) was thermally cracked into As and the growth chamber maintained at As ambient of 1.5 mbar. At the growth temperature of 425°C, 0.15 mbar of TrimethylIndium (TMIn) was introduced to initiate growth. The growth rate was typically 60 nm/minute [6]. Once the targeted nanowire length was achieved, the TMIn flow to chamber was shut, and sample allowed to cool to nearly room temperature in As ambient background. The nanowires were then removed from the CBE unit.

To connect nanowires, we dropped a single droplet of PMMA 950A5 onto the growth substrate. After 1 minute, the sample was spun at 3000 rpm in a spincoater to smooth the PMMA layer. Nanowires were observed to be bent after this process. Then the PMMA was removed by soaking in acetone. Simply dropping the PMMA, leaving for 1 minute, then removing the PMMA by soaking the sample in acetone for 10 minutes was also enough to bend and aggregate nanowires.

For the transport characterization, good ohmic contacts must be made to the nanowires. We chose a lateral contact geometry as it was simpler to fabricate. Nanowires were picked up from the growth substrate with cleanroom tissue paper, then brushed onto Si/SiO2 chips with 110 nm thick oxide. We searched for crossed nanowire geometries optically and determined the location of the nanowires with predefined Au alignment marks on the SiO2 chips. Contacts to the crossed nanowires were fabricated via standard e-beam lithography processes [7]. Briefly, 950A5 PMMA was spun onto the sample at 5000 rpm for 60 s and baked at 180°C for 5 minutes. After the contact pattern exposure, the resist was developed in MIBK : IPA (1 : 3) for 30 s. To ensure ohmic contacts to the nanowires, we passivated the nanowires in (NH_{4})_{2}S* _{x}* solution at 40°C prior to thermal evaporation of metal contacts Ti : Au (25 nm : 75 nm) [8].

#### 3. Results and Discussions

EBL-based seeding of nanowire growth is quite versatile, and seed-spacing, seed patterns, and nanowire length can be used to control the resulting 3D, interconnected geometry (Figure 1). Figure 1(a) is an image of an array of ~80 nm diameter InAs nanowires, with lengths of 760 nm and separation distance between nanowires of 400 nm. Figures 1(b)–1(d) show images of nanowires that have been brought into contact by the PMMA drop/acetone rinse procedure. These nanowires have diameter ~80 nm and lengths longer than 3 micron. In contrast, the nanowires of Figure 1(a) do not meet after the rinse procedure. We believe that the nanowires here are not long enough, such that the external forces and torques are not sufficient to overcome the inherent nanowire stiffness. Figure 1(b) presents the simplest structure beyond single vertical nanowires, that is a doublet of two bent and connected nanowires, while Figure 1(c) shows a parallelogram arrangement of four nanowires, which we call “tetrapod,” and Figure 1(d) shows a hexagonal arrangement of six nanowires, or “hexapod.”

We observed bent and aggregated nanowires after spincoating a PMMA layer on the growth substrate. During the spin process, the PMMA is flattened out such that the upper parts of the nanowires are exposed, and the upper surface of the PMMA curves in relation to the nanowires, forming a meniscus (much like the upper surface of water in a test tube). The capillary action of the curved PMMA on the nanowire causes the nanowires to bend. Essentially, the nanowires bend as a result of a competition between intrananowire elasticity and internanowire adhesion forces. The surface tension at the liquid-nanowire-air interface, * γ*, must be large enough to overcome the inherent rigidity of the nanowire [9]. We further observed that nanowires can be bent without the need for a spin step. A meniscus can also be formed by a drying or evaporative process, such as when the PMMA is removed by acetone and the sample then blown dry, instead of relying on spinning the liquid [10].

Nanowires have a bending stiffness which depends roughly on , where *E* is the Young’s modulus and *r* the radius of the nanowire. Here we assume that one end of the nanowire is clamped to the substrate, and the forces in play occur where the meniscus is formed [10, 11]. The maximum adhesive torques occur when the meniscus is at the top of the nanowire (or at the beginning of the evaporative process). The force required to bend the nanowires then goes as , where *d* is the internanowire distance and *L* the length of the nanowire. For InAs nanowires, Young’s modulus is ~70 GPa, which is slightly lower than the bulk theoretical value of 97 GPa [12]. For 500 nm nanowire separation, lengths of about 2 um and 40 nm radius, bending forces are in the tens of nN range. The critical factor determining whether the nanowire bends or not, as seen when comparing the situations in Figures 1(a) or 1(b)–1(d), is the length of the nanowire. We can estimate a critical length, , for 500 nm nanowire separation, 40 nm radius, and PMMA-air surface tension *γ* = 33 mN/m [13]. Nanowires longer than the critical length will bend, while those shorter will remain upright. This estimate is in the ballpark of what is experimentally observed—2 um length or longer InAs nanowires are needed for the bending to be possible for 40 nm or larger diameter nanowires. This model is simple and works but is far from complete, as we have ignored the contributions from electrostatic repulsive forces from charge buildup on the nanowires [11]. We also have ignored the fact that for InAs nanowires grown in the CBE with the diameters discussed here, the crystal structure tends towards Wurtzite [14]. In this case, it is better to approximate the nanowire shape as hexagonal and not circular. The key point though is that longer nanowires can better bend to accommodate the attractive capillary force. Once the nanowires come into contact, they likely remain in contact due to short-range van der Waal’s forces [15].

To demonstrate the controllability of this process, Figure 2 shows hexapod arrangements with the spacing between adjacent nanowires varied from ~200 nm to 1 um. The individual nanowires have diameters around 40 nm. In all cases, bending and connecting of nanowires is possible. The images show nanowires from the same substrate. Nanowires on a separate substrate during the same growth also exhibit the same behavior.

To realize functional devices with these structures, it is important to know the nature of the junction between two nanowires joined in such a way. In particular, a native oxide forms on the surface of the InAs nanowires once exposed to air. Crossed nanowires effectively would form a semiconductor-oxide-semiconductor junction. To understand the transport characteristics through such a contact, we prepared nanowire junctions with metal contact electrodes as shown in the inset of Figure 3. Here, the nanowire contacted with electrodes 3 and 4 lies flat on the substrate surface (bottom nanowire). The nanowire, connected through electrodes 1-2, lies on top of this nanowire. From the linear conductance, Figure 3, it is evident that the two nanowires conduct, though the behavior is quite different. Conductance through the nanowire contacted by electrodes 1-2, the top nanowire, is ~3 times lower than that in the bottom nanowire. This factor of 3 is about the difference in lengths of the contacted region for the bottom and top nanowires. However, the pinchoff voltage, , which is where the nanowire is completely shut and no further current flows, is also at more negative voltage for the bottom nanowire. The pinchoff voltage is related to the density of carriers in the nanowire, and comparing the pinchoff voltages of the top and bottom nanowires reveals that the charge density of the bottom nanowire is larger, requiring more negative gate voltages to fully drive away all electronic charge. This suggests that there may be a kink or bend in the top nanowire right at the junction, which may affect the charge density. Surprisingly, the pinchoff voltage shifts to more positive voltage at higher temperature. This is unusual, as the pinchoff voltage tends to shift more negative with increasing temperature. It is possible that the junction geometry and the floating voltage on the other nanowire during the conductance measurement may play a role. Further studies with nanowire contact regions with nearly equal length to better understand the effect of the bend are in progress.

An alternating electrical current (AC) can be driven through the junction as seen in Figure 4. On the other hand, for up to V DC bias, no DC current passes through, which points to the capacitive nature of the junction. Applying a backgate voltage tunes the allowed current through the crossed junction. When both nanowires are shut at Vbackgate <−6 V, see Figure 3, the junction is “off.” At gate voltages greater than 0 V, both nanowires are open, putting the junction in an “on” state.

The capacitive nature of the junction also suggests that one nanowire could be used to gate the other. In Figure 5 we demonstrate that this is possible, by applying a voltage, , to the top nanowire, which then modulates the amount of current in the bottom nanowire, see Figure 5 right inset for a schematic. The backgate voltage is set to 1.9 V such that both nanowires are slightly open. The arrow in inset of Figure 5 shows the voltage the bottom nanowire is set to. Pushing > 2 V enhances the amount of current through the bottom nanowire, while going to <−3 V shuts the conducting channel beneath the top nanowire gate. The diameter of the top nanowire effectively determines the conducting channel length, and it would be interesting to investigate whether smaller diameter nanowires gate as effectively.

#### 4. Conclusions

In conclusion, we have demonstrated a versatile and simple technique to bend and connect vertically free-standing nanowires and have separately characterized the transport properties of junctions formed by crossing one nanowire on top of another. By controlling the internanowire spacing with lithography and undergoing a rinse procedure, nanowire doublet, tetrapod, and hexapod assemblies can be formed. A key factor for allowing the nanowires to meet is to grow wires longer than a critical length so that capillary forces arising from the rinse procedure can overcome the nanowire’s inherent stiffness. Separately, as the nanowires have a native oxide, we have determined that junctions of two crossed nanowires would be capacitive in nature. A nanowire was then used to field effect control another nanowire in this crossed junction geometry. This points to the potential to use an all-nanowire circuit, as both channel and gate, in nanoelectronic devices.

#### Acknowledgments

The authors acknowledge support from nmC@LU, the Swedish Research Council, the Strategic Foundation, and Knut and Alice Wallenberg Foundation.

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