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Journal of Sensors
Volume 2015, Article ID 352036, 13 pages
http://dx.doi.org/10.1155/2015/352036
Research Article

Design and Optimization of a Low Power Pressure Sensor for Wireless Biomedical Applications

IUMA Information and Communication Systems, Institute for Applied Microelectronics, University of Las Palmas de Gran Canaria, 35017 Las Palmas de Gran Canaria, Spain

Received 16 March 2015; Revised 30 June 2015; Accepted 5 August 2015

Academic Editor: Andreas Schütze

Copyright © 2015 J. Sosa et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

A blood pressure sensor suitable for wireless biomedical applications is designed and optimized. State-of-the-art blood pressure sensors based on piezoresistive transducers in a full Wheatstone bridge configuration use low ohmic values because of relatively high sensitivity and low noise approach resulting in high power consumption. In this paper, the piezoresistance values are increased in order to reduce by one order of magnitude the power consumption in comparison with literature approaches. The microelectromechanical system (MEMS) pressure sensor, the mixed signal circuits signal conditioning circuitry, and the successive approximation register (SAR) analog-to-digital converter (ADC) are designed, optimized, and integrated in the same substrate using a commercial 1 μm CMOS technology. As result of the optimization, we obtained a digital sensor with high sensitivity, low noise (0.002 μV/Hz), and low power consumption (358 μW). Finally, the piezoresistance noise does not affect the pressure sensor application since its value is lower than half least significant bit (LSB) of the ADC.

1. Introduction

Nowadays, wireless sensor networks are applied to wide range of applications [1]. In healthcare area, the main advantage of the wireless sensor technologies is that eliminating wires promotes the patient autonomy and reduces potential electrical hazards [2]. A common and very useful application to develop wireless sensors in healthcare is the blood pressure measurement [3].

However, the weakness of any wireless sensor is the battery life [4]. Therefore, the power consumption is a critical point in the design of these particular sensors. Basically, a design objective is to optimize the usage of the stored energy in the wireless sensor battery. In other words, extend the life of a nonrechargeable battery or reduce the discharging rate in a rechargeable battery/accumulator.

From a high level point of view, a wireless sensor is composed of three different units [5]. A sensor unit runs the measurement and produces a value that a communication unit transmits. The third block is the battery/accumulator unit that provides the required energy to sensor and communication units.

In addition, another important design key point is the distance between the wireless blood pressure sensor and the monitoring equipment. Obviously, the power consumption optimization of the blood pressure sensor reduces the required energy of the wireless sensor. In this case, the saved energy due to the optimization process is also used to increase the transmission power instead of extending the battery life. As a summary, optimizing the power consumption of the blood pressure sensor increases the distance of the wireless communications and/or the battery life.

State-of-the-art blood pressure transducers, based on four resistors in a full Wheatstone bridge configuration, are usually optimized for sensitivity [614] and linearity. Temperature effect on sensitivity in silicon piezoresistive transducer has been studied in detail in [1416]. In [16] authors analyze the noise in piezoresistive and capacitive silicon pressure sensors. They conclude that the best configuration to obtain the lowest noise is achieved by the Wheatstone bridge configuration and for capacitive pressure sensors the best configuration depends on the dimensions of the sensor.

Most of the piezoresistive transducers are ion-implanted into a thin silicon monocrystalline membrane. Typical values are in the range between 100 Ω and 3 kΩ, powered between 3 V and 5 V, which means a current consumption between 1 mA and 50 mA, typically 5 mA, only for the full Wheatstone bridge without the required signal conditioning circuit—a signal conditioning circuit with at least one operational amplifier is required.

This work proposes the design of a blood pressure sensor and its optimization of low power, low noise, and high sensitivity. These optimization objectives are conflicting between them. For this reason, the tradeoff curves of the blood pressure sensor are analyzed in detail for obtaining optimal design points in our application. We use a mature and commercial mixed signal technology of 1.0 μm CMOS process [17] that includes integrated MEMS sensors in the same substrate.

This paper is organized as follows. In Section 2 mechanical behavior of a diaphragm—pressure sensor—is analyzed in detail. Maximum deformation areas are computed and illustrated. In addition, the layout dimensions and positions of several piezoresistances—250, 500, and 1000 kΩ—are calculated. The analysis of both sensitivity and power consumption of a full Wheatstone bridge and differential amplifier circuit to achieve optimum power and sensitivity design points is presented in Section 3. In addition, this section introduces the design of a low power SAR ADC. Section 4 provides a complete noise analysis for the whole design. A comparison with other similar works is shown in Section 5. Finally, conclusions are presented in Section 6.

2. Electromechanical Analysis

Techniques for measuring pressure require applying pressure on one side of a deformable diaphragm and determining how much the diaphragm deforms. Silicon has proved to be an excellent material for building small pressure sensors. Nowadays, pressure sensors constitute the largest market segment of mechanical MEMS devices [18].

There are two main methods of sensing deformation when a differential pressure is applied to the diaphragm in healthcare area, by capacitance or by piezoresistance [19]. Capacitive pressure sensors have low cost, low power, and high sensitivity in comparison with piezoresistive sensors. But they require, in general, complex signal conditioning circuitries. Piezoresistive pressure sensors have low cost and medium/good sensitivity in comparison with capacitive sensors and their associated circuitries are simplest. Their weakness is that they consume more power than capacitive sensors. Finally, the main advantage of the piezoresistive sensors in healthcare applications is that the piezoresistors never are in contact with the biological environment [3].

A piezoresistive pressure sensor is composed of a diaphragm and at least one or more than one piezoresistor. Those sensing elements are placed on or embedded in the diaphragm. When a differential pressure is applied to the diaphragm its deformation modifies the ohmic values of each piezoresistor.

For a given commercial bulk micromachining technology where it is not possible to modify the process parameters, the design parameters/variables are the dimensions of the diaphragm (width, length, and thickness), the shape of the piezoresistors (layout), and its placement (location). The performance optimization of piezoresistive blood pressure sensor in terms of sensitivity, temperature influence, and noise is done through tuning those size, shape, and placement design variables.

2.1. Mechanical Characterization

In this section, we analyze the mechanical behavior of a diaphragm of constant thickness and square dimensions and under a differential pressure of 15 kPa. In particular, we determine the membrane behavior when this pressure is applied and locate where the maximum deformations are produced. These computations were done using the analytical equations found in [22, 23].

From Kirchhoff’s assumptions for bending of thin plates (diaphragms), the following matrix equation is defined:where is the Young Modulus; is the depth axis; coordinate refers to the middle of the membrane thickness; is Poisson Modulus; and are, respectively, the stress in the directions of axes and ; and is the component of the main diagonal of the stress tensor.

And the deflection is defined aswhere and are the dimensions of the horizontal and vertical sides and are the stiffness coefficients.

The mechanical behavior of a biomedical pressure sensor diaphragm using silicon is analyzed in 1000 × 1000 × 10 μm biomedical pressure transducer diaphragm. Table 1 summarizes the sensor material properties [20, 21].

Table 1: Mechanical material properties [20, 21].

The wafer material is an orthotropic silicon (100). To maximize the sensitivity of its piezoresistive transducers, the sensor is oriented with its edges normal and parallel to material direction [2025] (see Figure 1). To carry out numerical calculations, we used Finite Element Method (FEM) analysis. The applied boundary conditions are as follows: (a) the edges of the diaphragm are fixed, so we do not mesh the diaphragm frame, and (b) the uniform distributed applied pressure is 15 kPa. Typical standard values [22] that match with our design constraints are used.

Figure 1: Wafer material and transducer relative orientation: .

We have calculated deflections , , and and Von Mises stress maps in the external surface of the diaphragm and their respective strain maps , , and . Figure 2 shows the mechanical 3D deformation of the diaphragm and the maximum displacement of 1.6 μm in direction. Figure 3 shows 3D stress map with a maximum of 40 MPa in the middle of the two edges of the diaphragm parallel to -axis direction. stress map presents exactly the same map but rotated 90°. Figure 4 presents 2D strain map which has the same appearance as map, including two maximums in the edges parallel to -axis. And, finally, Figure 5 displays 2D strain map that illustrates two maximums and two minimums. However, for Manhattan layout style this configuration is not useful.

Figure 2: Absolute deflexion of 1000 × 1000 × 10 μm diaphragm applied a differential pressure of 15 kPa.
Figure 3: Mechanical stress distribution in direction () when a differential pressure of 15 kPa is applied to 1000 × 1000 × 10 μm diaphragm.
Figure 4: Strain distribution map in direction () of 1000 × 1000 × 10 μm diaphragm.
Figure 5: Strain distribution map in direction () of 1000 × 1000 × 10 μm diaphragm.
2.2. Piezoresistance Optimization

In this section, the Gauge Factor () or strain factor of the piezoresistive elements, given by the following equation, is maximized:where is denominated sensitivity; is the deformation along specific axes or ; is the piezoresistive coefficient which depends on material properties (see Table 2); and is the Young Modulus.

Table 2: Piezoresistive coefficients and doping [17].

Table 2 illustrates that values are constant values and depend on the material properties, such as , which is the maximum longitudinal value in a specific direction, in our case direction. Thus, the next step is to aim at the best Gauge Factor by optimizing (3). If and are maximum, must be also maximum. The maximum value of is shown in Figure 4 on the left and right sides of the diaphragm in red.

The value of sensitivity [26] represents the sensitivity of the piezoresistive elements as a function of their piezoresistive coefficients referred to as the main crystallographic axes of Si, and the stress on the diaphragm and the orientation of the piezoresistor as a function of the angle , as shown in Figure 1, iswhere

Figure 6 illustrates sensitivity for an angle . Maximum values of sensitivity are in the middle of the diaphragm. These values are negative in the direction of -axis and positive in the direction of -axis due to the piezoresistive characteristics.

Figure 6: Sensitivity map of 1000 × 1000 × 10 μm diaphragm using XFAB XC10 technology [17] and normalized resistance values for .

We determine the layout dimensions and positions of the nominal piezoresistances of 250, 500, and 1000 kΩ placed on the diaphragm. These resistances are high enough to get low power consumption pressure microsensors.

The classical formulation for piezoresistance [2729] was used and implemented using FEM. Piezoresistive coefficients are referred to as the main crystallographic axis for a concentration of boron = 2.10 × 10+19 cm−3 [17].

As is shown in Figure 7, the layout area for the piezoresistances is a rectangle of width and length and dimensions for horizontal and vertical placements, respectively. Those rectangles are aligned with - and -axis of the diaphragm and centered on the two diaphragm edges, horizontal and vertical, respectively. This placement is because of the maximum values of and in the diaphragm, as shown in Figures 3 and 4.

Figure 7: Layout of the blood pressure sensor: location of horizontal and vertical sensing areas; black layers are piezoresistors and blue layers are low resistance connections [24].

Each one of these layout areas contains several piezoresistance elements/segments and of width and thickness (black layer in Figure 7). They are connected serially in a serpentine shape. The connections between piezoresistors are done using a low resistance and low piezoresistance dependency layer [24] (blue layer in Figure 7). The individual piezoresistances are separated one to each other by a distance according to minimum design rules. For 1.0 μm CMOS process from XFAB (XC10), the thickness and width of each individual piezoresistance are 0.4 μm and 1.2 μm, respectively. The separation between them is 1.2 μm.

Figures 8 and 9 present the tradeoff curves between the sensitivity and the length for vertical and horizontal piezoresistors, respectively. In both figures, for a given nominal resistance value (250, 500, and 1000 kΩ), the sensitivity starts from a low value and increases up to a maximum. After this maximum, the sensitivity decreases as the sensing area increases its length. From those tradeoff curves represented in Figures 8 and 9, the optimal design points (length) in terms of sensitivity are determined by the maximum value reached on each curve.

Figure 8: Optimal dimension for the horizontal layout area (rectangle) of piezoresistances.
Figure 9: Optimal dimension for the vertical layout area (rectangle) of piezoresistances.

Table 3 summarizes the obtained optimal design points for our 1000 × 1000 × 10 μm pressure sensor using XC10 technology process [17]. Column one is the nominal resistance. Columns two and three are the dimensions of the layout areas, and dimension, respectively. dimension is proportional to the nominal resistance value. Column four is the total area of the rectangle. Column five is the maximum sensitivity, and last column provides the number of individual piezoresistances (segments) contained on each rectangle. As is shown in Table 3, the optimal dimension for both horizontal and vertical placements is around 300 μm. The optimal dimension for both horizontal and vertical placements of 250, 500, and 1000 kΩ is 20, 40, and 80 μm, respectively.

Table 3: Piezoresistor optimal dimensions.

3. Full Wheatstone Bridge Analysis and Analog-to-Digital Converter

A full Wheatstone bridge is used to measure the small resistance variations of the diaphragm piezoresistive transducers. A full Wheatstone bridge configuration is used because of its improved linearity and sensitivity with respect to the quarter and half bridges. In this configuration a total of four piezoresistance elements are used; two of them have a positive pressure coefficient (), and the other two have a negative coefficient of the same magnitude ().

The main conclusion of studying the sensitivity of conventional full Wheatstone bridge against design parameters [3638] is that, in order to maximize the sensitivity of the full Wheatstone bridge, infinite power must be consumed.

We analyzed the sensitivity and power consumption of the full Wheatstone bridge to achieve optimum power and sensitivity design points. The sensitivity () of the full Wheatstone bridge determines the expected output voltage variation to the power supply voltage ratio, over the resistance variation to the nominal resistance ratio, and is expressed aswhere represents the output voltage, represents the power supply voltage, is the relative resistance variation of the piezoresistive elements, assumed to be all equals, is the ratio of nominal resistances from the top to bottom piezoresistors, is the ratio of nominal resistances in the right and left arms, and is the ratio of the detector resistance to the nominal bottom left resistance.

The total power consumption () and its minimum value () for a given sensitivity degradation ratio are where is the power supply voltage of the bridge, is the detector resistance, and is the nominal resistance of the reference leg—bottom left resistor. Therefore, for a maximum target power consumption and resistance constraint, we can determine the required design parameters (, , and values). The minimum power consumption is achieved by forcing the derivate of the total power consumption equal to zero at the given sensitivity degradation. This condition is met for constant and values and a variable value.

Table 4 presents the comparisons between our proposal and several literature and commercial Wheatstone bridges. The first column shows the sensitivity of the full bridge (μV/V/mmHg). The second column compares all approaches in terms of sensitivity reduction (dB). The third column gives the nominal resistance (kΩ). The fourth column compares the power consumption (dB). The sixth column exhibits the operating range (mmHg). Finally, the last column identifies the approach. On the other hand, the first row presents the best literature approach in terms of sensitivity [30]. In addition, the last row introduces the bridge with the lowest nominal resistance [35]. Those approaches are used as a reference in sensitivity and power consumption comparisons, respectively.

Table 4: Comparisons with other published and commercial piezoresistive sensors.

As it is shown in the sixth column, the working range is similar for all bridges (0–300/375 mmHg). The sensitivity reduction in our approach is only 4.86 dB for 1,000 kΩ bridge. The power consumption reduction in our approach is 30.97 dB when it is compared with the lowest nominal resistance bridge [35]. Finally, the power consumption reduction is 17.65 dB when our approach is compared with the best sensitivity solution [30].

Moreover, we analyzed the effect of connecting the full Wheatstone bridge to the signal conditioner (see Figure 10). We used a single operational amplifier (op-amp) as power reduction is our main concern, and this is related to the number of op-amp elements in the signal conditioner. In this work, all resistances are referred to as the input resistance of the gain loop. So , , , and are the nominal resistances of the bridge legs. The used op-amp model parameters are shown in Table 5. An autozero circuit [39], omitted in Figure 10, is placed on the input of op-amp circuit, canceling the offset voltage.

Table 5: Op-amp parameters.
Figure 10: Full Wheatstone bridge and differential amplifier circuit.

Figures 1113 show the sensitivity and power consumption curves for constant sensitivity degradation factors at the output of the bridge, for small and high loop gain ( and ) values. A constant parameter is used in these plots as it is proven to be an optimum sensitivity point [37, 38]. We verified that sensitivity plots versus and are not modified by the signal conditioner load, except in terms of value.

Figure 11: Full Wheatstone bridge sensitivity curves () in terms of nominal and detector resistances ratio (, values) for loop gains (a) and (b) .
Figure 12: Full Wheatstone bridge normalized power consumption in terms of nominal resistance ratio () and bridge sensitivity ratio () for loop gains (a) and (b) .
Figure 13: Total (bridge plus amplifier) power consumption variation with . (a) Normalized power in terms of nominal resistance () and (b) absolute power value against at the optimum nominal resistance () value.

Figure 11 shows the sensitivity map versus and values for and values at the differential amplifier. It can be observed that, for a constant sensitivity curve, a constant ratio is required. and ratios are required for sensitivity curves of and , respectively. Although we can get the same ratios for different or values, it must be noted that as the amplifier gain decreases, and low and values are used, the worst linearity is in versus plots, and a minimum value must be ensured to get the required sensitivity constraint.

The normalized power consumption , versus value for each sensitivity curve, is shown in Figure 12 for and values. We used  kΩ and  V values. It can be observed that, for the case , an optimum value exists close to which minimizes the power consumption. value can range from to for a power degradation of just 3 dB. Both optimum value and range vary with the gain parameter (). Observed variation from to is summarized in Table 6.

Table 6: Optimum value and range for different amplifier gain () values.

As lower values are used, the optimum value approximates to unit, which in turn is the optimum value for the full Wheatstone bridge connected to a single resistor detector. Also, the higher values are used, lower minimum power is reached, and range is extended, increasing the design space to trade power for implementation constraints—such as the maximum integrated resistor value.

Figure 13 presents the total power consumption for different values. Figure 13(a) plots the normalized power consumption for  kΩ and . Figure 13(b) shows the power consumption at the optimum power point for each sensitivity curve as function of the selected value at the input of the differential amplifier.

Although normalized power consumption curves at the full Wheatstone bridge do not depend on value, it can be noted that the power consumption of op-amp circuit overcomes the bridge consumption for high values. To minimize power consumption and facilitate the resistors integration, the main target will be to locate the minimum value which produces no significant increase in the total power consumption, for the corresponding signal degradation and piezoresistors ratio () constraints. Figure 13(b) indicates that the minimum power consumption is limited by op-amp power consumption (260 μW) and that a minimum 125 kΩ is required for lower than 25% power increase with respect to this value, for 50% signal degradation constraint. This signal degradation can be compensated by using higher amplifier gain. If we do not allow for this signal degradation, as occurs in a typical design methodology, it would conduce to a much higher , which in turn will make the layout integration difficult. Note that a signal degradation of 50% will reduce the signal power by 6 dB but will also reduce the thermal noise power because of reduced amplifier resistances.

Finally, if we require 1 V output voltage for %,  V, no more than 25% power increase over op-amp power consumption, no more than 50% signal degradation, due to SNR reduction constraints, and no more than 4 times ratio in the nominal resistance of the bridge transducers, due to matching constraints, we will achieve an optimum design point for , , ,  kΩ, and . That is, piezoresistive transducers of 1000 kΩ and 250 kΩ are required, the loop resistance () must be  kΩ, and the input resistance of the differential amplifier () must be 125 kΩ.

Simulation results for these parameters indicate an output voltage variation from −1 V to +0.995 V when varies from to . The total power consumption is 322 μW—62 μW at the bridge and 260 μW at the amplifier stage—and the output voltage offset is about −2.5 mV. Further power reduction, up to 260 μW, can be achieved by using higher values or allowing for higher signal degradation.

Moreover, low power consumption is a design constraint for the analog-to-digital converter (ADC) block. To cope with this issue, the existing architectures in the literature were reviewed in order to get a well thorough knowledge of the different alternatives already known [40, 41]. At this point, the most consuming elements that usually exist in the design of any ADC are mainly op-amp. From the repertoire of ADCs available in the state of the art [40], the successive approximations (SAR) architecture is a low power consumption candidate because of the reduced number of op-amps in its design. Recently, SAR ADC based on threshold comparator [42] (SAR TC-ADC) has demonstrated the superior performance for ultralow power applications as is the case of wireless sensing.

In the SAR TC-ADC (see Figure 14) the input differential voltage is compared, in different steps, with the limits of several subranges. These subranges are first defined as the two halves of all representable values, in which the limit between these is built with the MSB set to 1 and the remaining bits set to 0. The threshold voltage needed for every comparison is established using binary-scaled arrays of switched capacitors. From the first comparison it is decided if the MSB for the final value that represents the input value has to be set to 0 or 1. The following subranges defined have this previous bit already set and two other subranges are defined in which number that represents their common limit has the bit with the following less weight set to 1, and then the comparison is done in a similar way. This procedure is followed until all bits are set. This procedure is known as dichotomic search.

Figure 14: Successive approximations (SAR) analog-to-digital converter (ADC) based on threshold comparator (TC) structure (SAR TC-ADC).

For 90 nm CMOS technology a 6-bit TC-ADC exhibits a power consumption of 3 μW and 25 MS/s for a sampling rate of 40 ns. In the available CMOS technology for integration in the same substrate MEMS devices and electronics, 1.0 μm CMOS process from XFAB (XC10), the power consumption for 8-bit TC-ADC was estimated to be 63 μW and operate at a conservative sampling rate of 300 kSs, which assures that no missing codes are present.

4. Noise Analysis

Sensor and transducer stage consists of a MEMS diaphragm based on silicon. This diaphragm contains four piezoresistive elements to configure a full Wheatstone bridge circuit. Outputs of the bridge are inputs to a differential amplifier based on op-amp. We use a low noise amplifier with a high gain (). We assume that the noise is mainly due to piezoresistive transducers.

The noise in a piezoresistive transducer is mainly composed of Johnson noise and Hooge noise [27], which can be expressed as a superposition of noise components, so that

Thermal noise [43], known as Johnson or Johnson-Nyquist noise, is as follows:where is Boltzmann’s constant (J/K), is the absolute temperature (K), and is the resistance value (Ω).

Hooge noise [44] is inversely proportional to frequency. Thus, Hooge noise is often referred to as noise. This type of noise is highly dependent on fabrication process parameters, such as implant dose and energy and anneal parameters:

In (10), is the bias voltage across the resistor (V), is the frequency (Hz), and is the total number of free charge carriers in the volume unit (1/cm3). This equation is based on a step-like doping density profile. The dimensions, length (cm), width (cm), and thickness (cm) of the step-like profile, are , , and , respectively. Finally, is an empirical coefficient called Hooge coefficient. Recent research [27] demonstrates that is a dimension-independent parameter and it is due to the quality of the lattice and typically ranges from down to .

Table 7 summarizes the required data from the main features of the piezoresistive transducers presented previously (see Table 3) to compute the noise. The first column presents the nominal piezoresistance value of the transducer. The second column shows the total length of the piezoresistor. The layout dimensions of the piezoresistance transducer are minimum according to technology design rules, that is, 1.2 μm and 0.4 μm, for width and thickness, respectively. Finally, fifth column gives the maximum achieved sensitivity for the transducers.

Table 7: Parameters of the proposed piezoresistors.

In order to evaluate the benefits of our approach, we are interested in the worst case scenario (WCS) for the noise analysis. A low power consumption digital sensor with high sensitivity implies high nominal piezoresistance values. A larger nominal value produces greater Johnson noise. So, there is a tradeoff between the power consumption and the thermal noise. On the other hand, because piezoresistance value is proportional to the length of the transducer, Hooge noise is reduced when the nominal value of the piezoresistance is increased. Moreover, the Hooge coefficient depends on the technological process quality, and value for the worst case is   [27].

Table 8 presents the voltage noises and for each of the proposed piezoresistive transducers. The power supply voltage is 5.0 V. The first column gives the nominal value of the piezoresistance. The second and third columns show the Johnson and Hooge noise, measured in μV and μV/, respectively.

Table 8: Noise of the proposed piezoresistors.

Figure 15 illustrates the spectral response of the piezoresistive transducer proposed in this paper. At very low frequencies the Hooge noise overrides the Johnson noise. For example, the Johnson noise for 250 kΩ piezoresistor is dominant before 25.15 Hz; after that, the Johnson noise outperforms the Hooge noise. After 100 Hz the Johnson noise is dominant for all transducers. The output signal reached under maximum pressure has at least four orders of magnitude over the worst case noise at 0.1 Hz (250 kΩ). Also, Figure 15 demonstrates our previous assumption; high values of produce an increase of the Johnson noise and a reduction of the Hooge noise.

Figure 15: Noise curve of a quarter bridge when 250 kΩ, 500 kΩ, and 1000 kΩ piezoresistor is used.

Table 8 and Figure 15 are based on a pessimistic Hooge coefficient ()—usually found in metal resistors [48]. However, the Hooge coefficient for high concentration piezoresistors is much lower than for metal resistors [49]. The carriers concentration is (1/cm3). This is considered a high concentration because is greater than [50]. Therefore, the ratio between the maximum output signal and the Hooge noise will be greater in our piezoresistors. Finally, if we use a full Wheatstone bridge, the output signal will be increased by a factor of four, while the noise voltage will be just increased by a factor of two when taking the same horizontal and vertical piezoresistors into consideration.

Finally, to compute the total noise at the full Wheatstone bridge, we accounted for a maximum bandwidth of 150 kHz, Nyquist frequency at 300 kS/s, which is the maximum converting frequency of our 8-bit SAR TC-ADC as is discussed in Section 3. However, the blood pressure sensor application requires a maximum bandwidth of 125 Hz and to avoid out-of-band noise we added a capacitive element (154.15 pF) to the feedback resistance of the amplifier stage (8.26 MΩ), which effectively implements 125 Hz bandwidth low-pass filter. A minimum frequency of 0.1 Hz is considered for the integration of the Johnson and Hooge noise. In such conditions, a total noise voltage of 28.5 μV is found for the proposed bridge configuration in Section 3 and the data shown in Table 8, which is lower than half of LSB for 8-bit TC-ADC when considering a maximum output signal of the bridge of 15.12 mV at full scale condition.

5. Comparison

From literature related to wireless blood pressure sensor, Table 9 introduces the target performance for comparison purpose. The first column provides the references; the second column contains the power consumption for the sensor, signal conditioner, and converter. The third column gives some insight into the estimated noise in terms of μV/Hz for the critical section of the system under comparison. In this work, a total noise voltage of 28.5 μV is found for the proposed bridge configuration (see Section 4), and because the maximum bandwidth is 150 kHz the noise per unit of frequency is below 0.002 μV/Hz. The area for the system excluding the communication block is presented in the fourth column. Last two columns contain the CMOS process feature size and the sensing approach (capacitive or resistive). For comparison purpose we define a Figure of Merit (FoM) that links the three performances, power, noise, and area. FoM is the product of noise and power consumption per unit of area. The smallest the FoM is the more efficient the design is in terms of power consumption per unit of area and noise. As is shown in Table 9, our work exhibits the smallest value of FoM, due to the reduced power consumption, small area, and noise.

Table 9: Comparisons with other published works.

6. Conclusion

The ohmic values of the piezoresistive elements used in a blood pressure transducer have been enhanced from typical 100 Ω and 3 kΩ to 100 kΩ to 1000 kΩ, in order to reduce the power consumption. This great enhancement does not reduce sensitivity. This was achieved by means of an optimum allocation of the piezoresistors on the silicon membrane and a consequent optimization of the piezoresistors pattern design. The power consumption for full Wheatstone bridge is 62 μW for 1 V output voltage and a relative resistance variation of 0.605% and 5 V of power supply voltage. This power consumption is 24% of op-amp power consumption, the signal conditioner.

When the full Wheatstone bridge and the signal conditioner are combined with 8-bit SAR TC-ADC operating at 300 kHz, the total power consumption is under 400 μW. Because of the low noise characteristic of op-amp, the noise of 0.002 μV/Hz is mainly due to the piezoresistive transducers. The estimated noise voltage of 28.5 μV is lower than half of LSB for 15.12 mV output voltage signal, maximum output voltage of the bridge at full scale.

Comparisons against other published results demonstrate the superior performance of the proposed approach. FoM, the product noise and power consumption per unit of area (μW/mm2 × μV/Hz), for this work, is 0.77 against 0.80, 22.05, and 1846.15 of [45], [46], and [47], respectively.

The designed low power analog pressure sensor, combined with a low power ADC, results in a low power digital blood pressure sensor that is integrated in 1.0 μm CMOS process using the same substrate and suitable for wireless applications.

Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.

Acknowledgment

This work was funded by Project SURF (TEC2014-60527-C2-1-R) of the Spanish Ministry of Economy and Competitiveness.

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