VLSI Design

High Performance Design Automation of VLSI Interconnects


Status
Published

Guest Editors

High Performance Design Automation of VLSI Interconnects

Articles

  • Special Issue
  • - Volume 7
  • - Article ID 026574

On Rectilinear Distance-Preserving Trees

Gustavo E. Téllez | Majid Sarrafzadeh
  • Special Issue
  • - Volume 7
  • - Article ID 081296

Simulated Annealing Approach to Crosstalk Minimization in Gridded Channel Routing

Kyoung-Son Jhang | Soonhoi Ha | Chu Shik Jhon
  • Special Issue
  • - Volume 7
  • - Article ID 023013

Guest Editorial

Jun-Dong Cho
  • Special Issue
  • - Volume 7
  • - Article ID 072951

Automated Synthesis of Skew-Based Clock Distribution Networks

José Luis Neves | Eby G. Friedman
  • Special Issue
  • - Volume 7
  • - Article ID 034910

Minimum Crosstalk Vertical Layer Assignment for Three-Layer VHV Channel Routing

Shashidhar Thakur | Kai-Yuan Chao | D. F. Wong
  • Special Issue
  • - Volume 7
  • - Article ID 076525

Power Distribution Synthesis for VLSI

Ashok Vittal | Malgorzata Marek-Sadowska
  • Special Issue
  • - Volume 7
  • - Article ID 038483

Placement and Routing for Performance-Oriented FPGA Layout

Michael J. Alexander | James P. Cohoon | ... | Gabriel Robins
  • Special Issue
  • - Volume 7
  • - Article ID 084860

High Performance, Point-to-Point, Transmission Line Signaling

André Dehon | Thomas F. Knight
  • Special Issue
  • - Volume 7
  • - Article ID 069289

Clustering Network Modules with Different Implementations for Delay Minimization

Dimitrios Karayiannis | Spyros Tragoudas