VLSI Design

An Efficient Algorithm for the Calculation of Generalized Adding and Arithmetic Transforms From Disjoint Cubes of Boolean Functions

Hardware Architectures for the Orthogonal and Biorthogonal Wavelet Transform

Automatic Test Timing Assignment for RAMs Using Linear Programming

Characterization of Catastrophic Faults in Reconfigurable Systolic Arrays

νMOS-based Sorter for Arithmetic Applications

A New Clustering Method Based on General Connectivity

The Single Row Routing Problem Revisited: A Solution Based on Genetic Algorithms

New Methods for the Construction of Test Cases for Partitioning Heuristics

SCOAP-based Testability Analysis from Hierarchical Netlists

A Modular and Scalable Architecture for the Realization of High-speed Programmable Rank Order Filters Using Threshold Logic

Possible Wireless Single-Electron Logic Biased by Electric Field

Signature Analysis for Test Responses of Sequential Circuits

Computer-Aided Testing Systems: Evaluation and Benchmark Circuits

Carrier Thermal Conductivity: Analysis and Application to Submicron-Device Simulation

Symmetric and Programmable Multi-Chip Module for Low-Power Prototyping System

VLSI Design

Table of Contents

Table of Contents

An Efficient Algorithm for the Calculation of Generalized Adding and Arithmetic Transforms From Disjoint Cubes of Boolean Functions

Hardware Architectures for the Orthogonal and Biorthogonal Wavelet Transform

Automatic Test Timing Assignment for RAMs Using Linear Programming

Characterization of Catastrophic Faults in Reconfigurable Systolic Arrays

νMOS-based Sorter for Arithmetic Applications

A New Clustering Method Based on General Connectivity

The Single Row Routing Problem Revisited: A Solution Based on Genetic Algorithms

New Methods for the Construction of Test Cases for Partitioning Heuristics

SCOAP-based Testability Analysis from Hierarchical Netlists

A Modular and Scalable Architecture for the Realization of High-speed Programmable Rank Order Filters Using Threshold Logic

Possible Wireless Single-Electron Logic Biased by Electric Field

Signature Analysis for Test Responses of Sequential Circuits

Computer-Aided Testing Systems: Evaluation and Benchmark Circuits

Carrier Thermal Conductivity: Analysis and Application to Submicron-Device Simulation

Symmetric and Programmable Multi-Chip Module for Low-Power Prototyping System